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esp32c61/
lib.rs

1#![doc = "Peripheral access API for ESP32-C61 microcontrollers (generated using svd2rust v0.37.1 (f74f0b3 2026-04-17))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.37.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
2#![allow(non_camel_case_types)]
3#![allow(non_snake_case)]
4#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
5#![no_std]
6#![cfg_attr(docsrs, feature(doc_cfg))]
7#[doc = r"Number available in the NVIC for configuring priority"]
8pub const NVIC_PRIO_BITS: u8 = 0;
9#[allow(unused_imports)]
10use generic::*;
11#[doc = r"Common register and bit access and modify traits"]
12pub mod generic;
13#[cfg(feature = "rt")]
14extern "C" {
15    fn WIFI_MAC();
16    fn WIFI_MAC_NMI();
17    fn WIFI_PWR();
18    fn WIFI_BB();
19    fn BT_MAC();
20    fn BT_BB();
21    fn BT_BB_NMI();
22    fn LP_TIMER();
23    fn COEX();
24    fn BLE_TIMER();
25    fn BLE_SEC();
26    fn I2C_MASTER();
27    fn ZB_MAC();
28    fn PMU();
29    fn EFUSE();
30    fn LP_RTC_TIMER();
31    fn LP_WDT();
32    fn LP_APM_M0();
33    fn FROM_CPU_INTR0();
34    fn FROM_CPU_INTR1();
35    fn FROM_CPU_INTR2();
36    fn FROM_CPU_INTR3();
37    fn ASSIST_DEBUG();
38    fn TRACE();
39    fn CACHE();
40    fn CPU_PERI_TIMEOUT();
41    fn GPIO();
42    fn GPIO_EXT();
43    fn PAU();
44    fn HP_APM_M0();
45    fn HP_APM_M1();
46    fn HP_APM_M2();
47    fn HP_APM_M3();
48    fn MSPI();
49    fn I2S0();
50    fn UART0();
51    fn UART1();
52    fn UART2();
53    fn LEDC();
54    fn USB_DEVICE();
55    fn I2C_EXT0();
56    fn TG0_T0_LEVEL();
57    fn TG0_T1_LEVEL();
58    fn TG0_WDT_LEVEL();
59    fn TG1_T0_LEVEL();
60    fn TG1_T1_LEVEL();
61    fn TG1_WDT_LEVEL();
62    fn SYSTIMER_TARGET0();
63    fn SYSTIMER_TARGET1();
64    fn SYSTIMER_TARGET2();
65    fn APB_SARADC();
66    fn DMA_IN_CH0();
67    fn DMA_IN_CH1();
68    fn DMA_OUT_CH0();
69    fn DMA_OUT_CH1();
70    fn SPI2();
71    fn SHA();
72    fn ECC();
73    fn ECDSA();
74}
75#[doc(hidden)]
76#[repr(C)]
77pub union Vector {
78    pub _handler: unsafe extern "C" fn(),
79    pub _reserved: usize,
80}
81#[cfg(feature = "rt")]
82#[doc(hidden)]
83#[link_section = ".rwtext"]
84#[no_mangle]
85pub static __EXTERNAL_INTERRUPTS: [Vector; 66] = [
86    Vector { _handler: WIFI_MAC },
87    Vector {
88        _handler: WIFI_MAC_NMI,
89    },
90    Vector { _handler: WIFI_PWR },
91    Vector { _handler: WIFI_BB },
92    Vector { _handler: BT_MAC },
93    Vector { _handler: BT_BB },
94    Vector {
95        _handler: BT_BB_NMI,
96    },
97    Vector { _handler: LP_TIMER },
98    Vector { _handler: COEX },
99    Vector {
100        _handler: BLE_TIMER,
101    },
102    Vector { _handler: BLE_SEC },
103    Vector {
104        _handler: I2C_MASTER,
105    },
106    Vector { _handler: ZB_MAC },
107    Vector { _handler: PMU },
108    Vector { _handler: EFUSE },
109    Vector {
110        _handler: LP_RTC_TIMER,
111    },
112    Vector { _handler: LP_WDT },
113    Vector { _reserved: 0 },
114    Vector {
115        _handler: LP_APM_M0,
116    },
117    Vector {
118        _handler: FROM_CPU_INTR0,
119    },
120    Vector {
121        _handler: FROM_CPU_INTR1,
122    },
123    Vector {
124        _handler: FROM_CPU_INTR2,
125    },
126    Vector {
127        _handler: FROM_CPU_INTR3,
128    },
129    Vector {
130        _handler: ASSIST_DEBUG,
131    },
132    Vector { _handler: TRACE },
133    Vector { _handler: CACHE },
134    Vector {
135        _handler: CPU_PERI_TIMEOUT,
136    },
137    Vector { _handler: GPIO },
138    Vector { _handler: GPIO_EXT },
139    Vector { _handler: PAU },
140    Vector { _reserved: 0 },
141    Vector { _reserved: 0 },
142    Vector {
143        _handler: HP_APM_M0,
144    },
145    Vector {
146        _handler: HP_APM_M1,
147    },
148    Vector {
149        _handler: HP_APM_M2,
150    },
151    Vector {
152        _handler: HP_APM_M3,
153    },
154    Vector { _reserved: 0 },
155    Vector { _reserved: 0 },
156    Vector { _handler: MSPI },
157    Vector { _handler: I2S0 },
158    Vector { _handler: UART0 },
159    Vector { _handler: UART1 },
160    Vector { _handler: UART2 },
161    Vector { _handler: LEDC },
162    Vector {
163        _handler: USB_DEVICE,
164    },
165    Vector { _handler: I2C_EXT0 },
166    Vector {
167        _handler: TG0_T0_LEVEL,
168    },
169    Vector {
170        _handler: TG0_T1_LEVEL,
171    },
172    Vector {
173        _handler: TG0_WDT_LEVEL,
174    },
175    Vector {
176        _handler: TG1_T0_LEVEL,
177    },
178    Vector {
179        _handler: TG1_T1_LEVEL,
180    },
181    Vector {
182        _handler: TG1_WDT_LEVEL,
183    },
184    Vector {
185        _handler: SYSTIMER_TARGET0,
186    },
187    Vector {
188        _handler: SYSTIMER_TARGET1,
189    },
190    Vector {
191        _handler: SYSTIMER_TARGET2,
192    },
193    Vector {
194        _handler: APB_SARADC,
195    },
196    Vector { _reserved: 0 },
197    Vector { _reserved: 0 },
198    Vector {
199        _handler: DMA_IN_CH0,
200    },
201    Vector {
202        _handler: DMA_IN_CH1,
203    },
204    Vector {
205        _handler: DMA_OUT_CH0,
206    },
207    Vector {
208        _handler: DMA_OUT_CH1,
209    },
210    Vector { _handler: SPI2 },
211    Vector { _handler: SHA },
212    Vector { _handler: ECC },
213    Vector { _handler: ECDSA },
214];
215#[doc(hidden)]
216pub mod interrupt;
217pub use self::interrupt::Interrupt;
218#[doc = "Core Local Interrupts"]
219pub type CLINT = crate::Periph<clint::RegisterBlock, 0x2000_0000>;
220impl core::fmt::Debug for CLINT {
221    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
222        f.debug_struct("CLINT").finish()
223    }
224}
225#[doc = "Core Local Interrupts"]
226pub mod clint;
227#[doc = "Core Local Interrupt Controller"]
228pub type CLIC = crate::Periph<clic::RegisterBlock, 0x2080_0000>;
229impl core::fmt::Debug for CLIC {
230    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
231        f.debug_struct("CLIC").finish()
232    }
233}
234#[doc = "Core Local Interrupt Controller"]
235pub mod clic;
236#[doc = "AHB_DMA Peripheral"]
237pub type DMA = crate::Periph<dma::RegisterBlock, 0x6008_0000>;
238impl core::fmt::Debug for DMA {
239    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
240        f.debug_struct("DMA").finish()
241    }
242}
243#[doc = "AHB_DMA Peripheral"]
244pub mod dma;
245#[doc = "SAR (Successive Approximation Register) Analog-to-Digital Converter"]
246pub type APB_SARADC = crate::Periph<apb_saradc::RegisterBlock, 0x6000_e000>;
247impl core::fmt::Debug for APB_SARADC {
248    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
249        f.debug_struct("APB_SARADC").finish()
250    }
251}
252#[doc = "SAR (Successive Approximation Register) Analog-to-Digital Converter"]
253pub mod apb_saradc;
254#[doc = "ASSIST_DEBUG (BUS_MONITOR) Peripheral"]
255pub type ASSIST_DEBUG = crate::Periph<assist_debug::RegisterBlock, 0x600c_2000>;
256impl core::fmt::Debug for ASSIST_DEBUG {
257    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
258        f.debug_struct("ASSIST_DEBUG").finish()
259    }
260}
261#[doc = "ASSIST_DEBUG (BUS_MONITOR) Peripheral"]
262pub mod assist_debug;
263#[doc = "CACHE Peripheral"]
264pub type CACHE = crate::Periph<cache::RegisterBlock, 0x600c_8000>;
265impl core::fmt::Debug for CACHE {
266    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
267        f.debug_struct("CACHE").finish()
268    }
269}
270#[doc = "CACHE Peripheral"]
271pub mod cache;
272#[doc = "ECC (ECC Hardware Accelerator)"]
273pub type ECC = crate::Periph<ecc::RegisterBlock, 0x6008_b000>;
274impl core::fmt::Debug for ECC {
275    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
276        f.debug_struct("ECC").finish()
277    }
278}
279#[doc = "ECC (ECC Hardware Accelerator)"]
280pub mod ecc;
281#[doc = "ECDSA (Elliptic Curve Digital Signature Algorithm) Accelerator"]
282pub type ECDSA = crate::Periph<ecdsa::RegisterBlock, 0x6008_e000>;
283impl core::fmt::Debug for ECDSA {
284    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
285        f.debug_struct("ECDSA").finish()
286    }
287}
288#[doc = "ECDSA (Elliptic Curve Digital Signature Algorithm) Accelerator"]
289pub mod ecdsa;
290#[doc = "eFuse Controller"]
291pub type EFUSE = crate::Periph<efuse::RegisterBlock, 0x600b_4800>;
292impl core::fmt::Debug for EFUSE {
293    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
294        f.debug_struct("EFUSE").finish()
295    }
296}
297#[doc = "eFuse Controller"]
298pub mod efuse;
299#[doc = "General Purpose Input/Output"]
300pub type GPIO = crate::Periph<gpio::RegisterBlock, 0x6009_1000>;
301impl core::fmt::Debug for GPIO {
302    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
303        f.debug_struct("GPIO").finish()
304    }
305}
306#[doc = "General Purpose Input/Output"]
307pub mod gpio;
308#[doc = "GPIO_EXT Peripheral"]
309pub type GPIO_EXT = crate::Periph<gpio_ext::RegisterBlock, 0x6009_1e00>;
310impl core::fmt::Debug for GPIO_EXT {
311    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
312        f.debug_struct("GPIO_EXT").finish()
313    }
314}
315#[doc = "GPIO_EXT Peripheral"]
316pub mod gpio_ext;
317#[doc = "HP_APM Peripheral"]
318pub type HP_APM = crate::Periph<hp_apm::RegisterBlock, 0x6009_9000>;
319impl core::fmt::Debug for HP_APM {
320    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
321        f.debug_struct("HP_APM").finish()
322    }
323}
324#[doc = "HP_APM Peripheral"]
325pub mod hp_apm;
326#[doc = "MODEM_SYSCON"]
327pub type MODEM_SYSCON = crate::Periph<modem_syscon::RegisterBlock, 0x600a_9c00>;
328impl core::fmt::Debug for MODEM_SYSCON {
329    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
330        f.debug_struct("MODEM_SYSCON").finish()
331    }
332}
333#[doc = "MODEM_SYSCON"]
334pub mod modem_syscon;
335#[doc = "MODEM_LPCON"]
336pub type MODEM_LPCON = crate::Periph<modem_lpcon::RegisterBlock, 0x600a_f000>;
337impl core::fmt::Debug for MODEM_LPCON {
338    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
339        f.debug_struct("MODEM_LPCON").finish()
340    }
341}
342#[doc = "MODEM_LPCON"]
343pub mod modem_lpcon;
344#[doc = "I2C_ANA_MST Peripheral"]
345pub type I2C_ANA_MST = crate::Periph<i2c_ana_mst::RegisterBlock, 0x600a_f800>;
346impl core::fmt::Debug for I2C_ANA_MST {
347    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
348        f.debug_struct("I2C_ANA_MST").finish()
349    }
350}
351#[doc = "I2C_ANA_MST Peripheral"]
352pub mod i2c_ana_mst;
353#[doc = "HP_SYSTEM Peripheral"]
354pub type HP_SYS = crate::Periph<hp_sys::RegisterBlock, 0x6009_5000>;
355impl core::fmt::Debug for HP_SYS {
356    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
357        f.debug_struct("HP_SYS").finish()
358    }
359}
360#[doc = "HP_SYSTEM Peripheral"]
361pub mod hp_sys;
362#[doc = "I2C (Inter-Integrated Circuit) Controller 0"]
363pub type I2C0 = crate::Periph<i2c0::RegisterBlock, 0x6000_4000>;
364impl core::fmt::Debug for I2C0 {
365    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
366        f.debug_struct("I2C0").finish()
367    }
368}
369#[doc = "I2C (Inter-Integrated Circuit) Controller 0"]
370pub mod i2c0;
371#[doc = "I2S Peripheral"]
372pub type I2S0 = crate::Periph<i2s0::RegisterBlock, 0x6000_c000>;
373impl core::fmt::Debug for I2S0 {
374    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
375        f.debug_struct("I2S0").finish()
376    }
377}
378#[doc = "I2S Peripheral"]
379pub mod i2s0;
380#[doc = "Interrupt Controller (Core 0)"]
381pub type INTERRUPT_CORE0 = crate::Periph<interrupt_core0::RegisterBlock, 0x6001_0000>;
382impl core::fmt::Debug for INTERRUPT_CORE0 {
383    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
384        f.debug_struct("INTERRUPT_CORE0").finish()
385    }
386}
387#[doc = "Interrupt Controller (Core 0)"]
388pub mod interrupt_core0;
389#[doc = "INTPRI Peripheral"]
390pub type INTPRI = crate::Periph<intpri::RegisterBlock, 0x600c_5000>;
391impl core::fmt::Debug for INTPRI {
392    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
393        f.debug_struct("INTPRI").finish()
394    }
395}
396#[doc = "INTPRI Peripheral"]
397pub mod intpri;
398#[doc = "Input/Output Multiplexer"]
399pub type IO_MUX = crate::Periph<io_mux::RegisterBlock, 0x6009_0000>;
400impl core::fmt::Debug for IO_MUX {
401    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
402        f.debug_struct("IO_MUX").finish()
403    }
404}
405#[doc = "Input/Output Multiplexer"]
406pub mod io_mux;
407#[doc = "LED Control PWM (Pulse Width Modulation)"]
408pub type LEDC = crate::Periph<ledc::RegisterBlock, 0x6000_7000>;
409impl core::fmt::Debug for LEDC {
410    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
411        f.debug_struct("LEDC").finish()
412    }
413}
414#[doc = "LED Control PWM (Pulse Width Modulation)"]
415pub mod ledc;
416#[doc = "LPPERI Peripheral"]
417pub type LPPERI = crate::Periph<lpperi::RegisterBlock, 0x600b_2800>;
418impl core::fmt::Debug for LPPERI {
419    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
420        f.debug_struct("LPPERI").finish()
421    }
422}
423#[doc = "LPPERI Peripheral"]
424pub mod lpperi;
425#[doc = "LP_ANA Peripheral"]
426pub type LP_ANA = crate::Periph<lp_ana::RegisterBlock, 0x600b_2c00>;
427impl core::fmt::Debug for LP_ANA {
428    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
429        f.debug_struct("LP_ANA").finish()
430    }
431}
432#[doc = "LP_ANA Peripheral"]
433pub mod lp_ana;
434#[doc = "LP_AON Peripheral"]
435pub type LP_AON = crate::Periph<lp_aon::RegisterBlock, 0x600b_1000>;
436impl core::fmt::Debug for LP_AON {
437    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
438        f.debug_struct("LP_AON").finish()
439    }
440}
441#[doc = "LP_AON Peripheral"]
442pub mod lp_aon;
443#[doc = "Low-power Access Permission Management Controller"]
444pub type LP_APM = crate::Periph<lp_apm::RegisterBlock, 0x600b_3800>;
445impl core::fmt::Debug for LP_APM {
446    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
447        f.debug_struct("LP_APM").finish()
448    }
449}
450#[doc = "Low-power Access Permission Management Controller"]
451pub mod lp_apm;
452#[doc = "LP_CLKRST Peripheral"]
453pub type LP_CLKRST = crate::Periph<lp_clkrst::RegisterBlock, 0x600b_0400>;
454impl core::fmt::Debug for LP_CLKRST {
455    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
456        f.debug_struct("LP_CLKRST").finish()
457    }
458}
459#[doc = "LP_CLKRST Peripheral"]
460pub mod lp_clkrst;
461#[doc = "Low-power General Purpose Input/Output"]
462pub type LP_GPIO = crate::Periph<lp_gpio::RegisterBlock, 0x600b_4400>;
463impl core::fmt::Debug for LP_GPIO {
464    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
465        f.debug_struct("LP_GPIO").finish()
466    }
467}
468#[doc = "Low-power General Purpose Input/Output"]
469pub mod lp_gpio;
470#[doc = "Low-power Input/Output Multiplexer"]
471pub type LP_IO_MUX = crate::Periph<lp_io_mux::RegisterBlock, 0x600b_4000>;
472impl core::fmt::Debug for LP_IO_MUX {
473    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
474        f.debug_struct("LP_IO_MUX").finish()
475    }
476}
477#[doc = "Low-power Input/Output Multiplexer"]
478pub mod lp_io_mux;
479#[doc = "Low-power Trusted Execution Environment"]
480pub type LP_TEE = crate::Periph<lp_tee::RegisterBlock, 0x600b_3400>;
481impl core::fmt::Debug for LP_TEE {
482    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
483        f.debug_struct("LP_TEE").finish()
484    }
485}
486#[doc = "Low-power Trusted Execution Environment"]
487pub mod lp_tee;
488#[doc = "Low-power Timer"]
489pub type LP_TIMER = crate::Periph<lp_timer::RegisterBlock, 0x600b_0c00>;
490impl core::fmt::Debug for LP_TIMER {
491    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
492        f.debug_struct("LP_TIMER").finish()
493    }
494}
495#[doc = "Low-power Timer"]
496pub mod lp_timer;
497#[doc = "Low-power Watchdog Timer"]
498pub type LP_WDT = crate::Periph<lp_wdt::RegisterBlock, 0x600b_1c00>;
499impl core::fmt::Debug for LP_WDT {
500    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
501        f.debug_struct("LP_WDT").finish()
502    }
503}
504#[doc = "Low-power Watchdog Timer"]
505pub mod lp_wdt;
506#[doc = "MEM_MONITOR Peripheral"]
507pub type MEM_MONITOR = crate::Periph<mem_monitor::RegisterBlock, 0x6009_2000>;
508impl core::fmt::Debug for MEM_MONITOR {
509    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
510        f.debug_struct("MEM_MONITOR").finish()
511    }
512}
513#[doc = "MEM_MONITOR Peripheral"]
514pub mod mem_monitor;
515#[doc = "PAU Peripheral"]
516pub type PAU = crate::Periph<pau::RegisterBlock, 0x6009_3000>;
517impl core::fmt::Debug for PAU {
518    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
519        f.debug_struct("PAU").finish()
520    }
521}
522#[doc = "PAU Peripheral"]
523pub mod pau;
524#[doc = "PCR Peripheral"]
525pub type PCR = crate::Periph<pcr::RegisterBlock, 0x6009_6000>;
526impl core::fmt::Debug for PCR {
527    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
528        f.debug_struct("PCR").finish()
529    }
530}
531#[doc = "PCR Peripheral"]
532pub mod pcr;
533#[doc = "PMU Peripheral"]
534pub type PMU = crate::Periph<pmu::RegisterBlock, 0x600b_0000>;
535impl core::fmt::Debug for PMU {
536    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
537        f.debug_struct("PMU").finish()
538    }
539}
540#[doc = "PMU Peripheral"]
541pub mod pmu;
542#[doc = "PVT Peripheral"]
543pub type PVT = crate::Periph<pvt::RegisterBlock, 0x6001_9000>;
544impl core::fmt::Debug for PVT {
545    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
546        f.debug_struct("PVT").finish()
547    }
548}
549#[doc = "PVT Peripheral"]
550pub mod pvt;
551#[doc = "SHA (Secure Hash Algorithm) Accelerator"]
552pub type SHA = crate::Periph<sha::RegisterBlock, 0x6008_9000>;
553impl core::fmt::Debug for SHA {
554    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
555        f.debug_struct("SHA").finish()
556    }
557}
558#[doc = "SHA (Secure Hash Algorithm) Accelerator"]
559pub mod sha;
560#[doc = "Hardware Random Number Generator"]
561pub type RNG = crate::Periph<rng::RegisterBlock, 0x600b_2800>;
562impl core::fmt::Debug for RNG {
563    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
564        f.debug_struct("RNG").finish()
565    }
566}
567#[doc = "Hardware Random Number Generator"]
568pub mod rng;
569#[doc = "Event Task Matrix"]
570pub type SOC_ETM = crate::Periph<soc_etm::RegisterBlock, 0x6001_3000>;
571impl core::fmt::Debug for SOC_ETM {
572    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
573        f.debug_struct("SOC_ETM").finish()
574    }
575}
576#[doc = "Event Task Matrix"]
577pub mod soc_etm;
578#[doc = "SDIO SLC"]
579pub type SLC = crate::Periph<slc::RegisterBlock, 0x6001_7000>;
580impl core::fmt::Debug for SLC {
581    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
582        f.debug_struct("SLC").finish()
583    }
584}
585#[doc = "SDIO SLC"]
586pub mod slc;
587#[doc = "SPI (Serial Peripheral Interface) Controller 0"]
588pub type SPI0 = crate::Periph<spi0::RegisterBlock, 0x6000_2000>;
589impl core::fmt::Debug for SPI0 {
590    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
591        f.debug_struct("SPI0").finish()
592    }
593}
594#[doc = "SPI (Serial Peripheral Interface) Controller 0"]
595pub mod spi0;
596#[doc = "SPI (Serial Peripheral Interface) Controller 2"]
597pub type SPI2 = crate::Periph<spi2::RegisterBlock, 0x6008_1000>;
598impl core::fmt::Debug for SPI2 {
599    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
600        f.debug_struct("SPI2").finish()
601    }
602}
603#[doc = "SPI (Serial Peripheral Interface) Controller 2"]
604pub mod spi2;
605#[doc = "SPI (Serial Peripheral Interface) Controller 1"]
606pub type SPI1 = crate::Periph<spi1::RegisterBlock, 0x6000_3000>;
607impl core::fmt::Debug for SPI1 {
608    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
609        f.debug_struct("SPI1").finish()
610    }
611}
612#[doc = "SPI (Serial Peripheral Interface) Controller 1"]
613pub mod spi1;
614#[doc = "System Timer"]
615pub type SYSTIMER = crate::Periph<systimer::RegisterBlock, 0x6000_a000>;
616impl core::fmt::Debug for SYSTIMER {
617    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
618        f.debug_struct("SYSTIMER").finish()
619    }
620}
621#[doc = "System Timer"]
622pub mod systimer;
623#[doc = "TEE Peripheral"]
624pub type TEE = crate::Periph<tee::RegisterBlock, 0x6009_8000>;
625impl core::fmt::Debug for TEE {
626    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
627        f.debug_struct("TEE").finish()
628    }
629}
630#[doc = "TEE Peripheral"]
631pub mod tee;
632#[doc = "Timer Group 0"]
633pub type TIMG0 = crate::Periph<timg0::RegisterBlock, 0x6000_8000>;
634impl core::fmt::Debug for TIMG0 {
635    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
636        f.debug_struct("TIMG0").finish()
637    }
638}
639#[doc = "Timer Group 0"]
640pub mod timg0;
641#[doc = "Timer Group 1"]
642pub type TIMG1 = crate::Periph<timg0::RegisterBlock, 0x6000_9000>;
643impl core::fmt::Debug for TIMG1 {
644    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
645        f.debug_struct("TIMG1").finish()
646    }
647}
648#[doc = "Timer Group 1"]
649pub use self::timg0 as timg1;
650#[doc = "RISC-V Trace Encoder"]
651pub type TRACE = crate::Periph<trace::RegisterBlock, 0x600c_0000>;
652impl core::fmt::Debug for TRACE {
653    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
654        f.debug_struct("TRACE").finish()
655    }
656}
657#[doc = "RISC-V Trace Encoder"]
658pub mod trace;
659#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller 0"]
660pub type UART0 = crate::Periph<uart0::RegisterBlock, 0x6000_0000>;
661impl core::fmt::Debug for UART0 {
662    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
663        f.debug_struct("UART0").finish()
664    }
665}
666#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller 0"]
667pub mod uart0;
668#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller 1"]
669pub type UART1 = crate::Periph<uart0::RegisterBlock, 0x6000_1000>;
670impl core::fmt::Debug for UART1 {
671    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
672        f.debug_struct("UART1").finish()
673    }
674}
675#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller 1"]
676pub use self::uart0 as uart1;
677#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller 2"]
678pub type UART2 = crate::Periph<uart0::RegisterBlock, 0x6000_6000>;
679impl core::fmt::Debug for UART2 {
680    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
681        f.debug_struct("UART2").finish()
682    }
683}
684#[doc = "UART (Universal Asynchronous Receiver-Transmitter) Controller 2"]
685pub use self::uart0 as uart2;
686#[doc = "Full-speed USB Serial/JTAG Controller"]
687pub type USB_DEVICE = crate::Periph<usb_device::RegisterBlock, 0x6000_f000>;
688impl core::fmt::Debug for USB_DEVICE {
689    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
690        f.debug_struct("USB_DEVICE").finish()
691    }
692}
693#[doc = "Full-speed USB Serial/JTAG Controller"]
694pub mod usb_device;