esp32c6/usb_device/
int_raw.rs1#[doc = "Register `INT_RAW` reader"]
2pub type R = crate::R<INT_RAW_SPEC>;
3#[doc = "Register `INT_RAW` writer"]
4pub type W = crate::W<INT_RAW_SPEC>;
5#[doc = "Field `JTAG_IN_FLUSH` reader - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
6pub type JTAG_IN_FLUSH_R = crate::BitReader;
7#[doc = "Field `JTAG_IN_FLUSH` writer - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
8pub type JTAG_IN_FLUSH_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SOF` reader - The raw interrupt bit turns to high level when SOF frame is received."]
10pub type SOF_R = crate::BitReader;
11#[doc = "Field `SOF` writer - The raw interrupt bit turns to high level when SOF frame is received."]
12pub type SOF_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SERIAL_OUT_RECV_PKT` reader - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
14pub type SERIAL_OUT_RECV_PKT_R = crate::BitReader;
15#[doc = "Field `SERIAL_OUT_RECV_PKT` writer - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
16pub type SERIAL_OUT_RECV_PKT_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SERIAL_IN_EMPTY` reader - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
18pub type SERIAL_IN_EMPTY_R = crate::BitReader;
19#[doc = "Field `SERIAL_IN_EMPTY` writer - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
20pub type SERIAL_IN_EMPTY_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `PID_ERR` reader - The raw interrupt bit turns to high level when pid error is detected."]
22pub type PID_ERR_R = crate::BitReader;
23#[doc = "Field `PID_ERR` writer - The raw interrupt bit turns to high level when pid error is detected."]
24pub type PID_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `CRC5_ERR` reader - The raw interrupt bit turns to high level when CRC5 error is detected."]
26pub type CRC5_ERR_R = crate::BitReader;
27#[doc = "Field `CRC5_ERR` writer - The raw interrupt bit turns to high level when CRC5 error is detected."]
28pub type CRC5_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `CRC16_ERR` reader - The raw interrupt bit turns to high level when CRC16 error is detected."]
30pub type CRC16_ERR_R = crate::BitReader;
31#[doc = "Field `CRC16_ERR` writer - The raw interrupt bit turns to high level when CRC16 error is detected."]
32pub type CRC16_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `STUFF_ERR` reader - The raw interrupt bit turns to high level when stuff error is detected."]
34pub type STUFF_ERR_R = crate::BitReader;
35#[doc = "Field `STUFF_ERR` writer - The raw interrupt bit turns to high level when stuff error is detected."]
36pub type STUFF_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `IN_TOKEN_REC_IN_EP1` reader - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
38pub type IN_TOKEN_REC_IN_EP1_R = crate::BitReader;
39#[doc = "Field `IN_TOKEN_REC_IN_EP1` writer - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
40pub type IN_TOKEN_REC_IN_EP1_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `USB_BUS_RESET` reader - The raw interrupt bit turns to high level when usb bus reset is detected."]
42pub type USB_BUS_RESET_R = crate::BitReader;
43#[doc = "Field `USB_BUS_RESET` writer - The raw interrupt bit turns to high level when usb bus reset is detected."]
44pub type USB_BUS_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `OUT_EP1_ZERO_PAYLOAD` reader - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
46pub type OUT_EP1_ZERO_PAYLOAD_R = crate::BitReader;
47#[doc = "Field `OUT_EP1_ZERO_PAYLOAD` writer - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
48pub type OUT_EP1_ZERO_PAYLOAD_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `OUT_EP2_ZERO_PAYLOAD` reader - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
50pub type OUT_EP2_ZERO_PAYLOAD_R = crate::BitReader;
51#[doc = "Field `OUT_EP2_ZERO_PAYLOAD` writer - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
52pub type OUT_EP2_ZERO_PAYLOAD_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `RTS_CHG` reader - The raw interrupt bit turns to high level when level of RTS from usb serial channel is changed."]
54pub type RTS_CHG_R = crate::BitReader;
55#[doc = "Field `RTS_CHG` writer - The raw interrupt bit turns to high level when level of RTS from usb serial channel is changed."]
56pub type RTS_CHG_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `DTR_CHG` reader - The raw interrupt bit turns to high level when level of DTR from usb serial channel is changed."]
58pub type DTR_CHG_R = crate::BitReader;
59#[doc = "Field `DTR_CHG` writer - The raw interrupt bit turns to high level when level of DTR from usb serial channel is changed."]
60pub type DTR_CHG_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `GET_LINE_CODE` reader - The raw interrupt bit turns to high level when level of GET LINE CODING request is received."]
62pub type GET_LINE_CODE_R = crate::BitReader;
63#[doc = "Field `GET_LINE_CODE` writer - The raw interrupt bit turns to high level when level of GET LINE CODING request is received."]
64pub type GET_LINE_CODE_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `SET_LINE_CODE` reader - The raw interrupt bit turns to high level when level of SET LINE CODING request is received."]
66pub type SET_LINE_CODE_R = crate::BitReader;
67#[doc = "Field `SET_LINE_CODE` writer - The raw interrupt bit turns to high level when level of SET LINE CODING request is received."]
68pub type SET_LINE_CODE_W<'a, REG> = crate::BitWriter<'a, REG>;
69impl R {
70 #[doc = "Bit 0 - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
71 #[inline(always)]
72 pub fn jtag_in_flush(&self) -> JTAG_IN_FLUSH_R {
73 JTAG_IN_FLUSH_R::new((self.bits & 1) != 0)
74 }
75 #[doc = "Bit 1 - The raw interrupt bit turns to high level when SOF frame is received."]
76 #[inline(always)]
77 pub fn sof(&self) -> SOF_R {
78 SOF_R::new(((self.bits >> 1) & 1) != 0)
79 }
80 #[doc = "Bit 2 - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
81 #[inline(always)]
82 pub fn serial_out_recv_pkt(&self) -> SERIAL_OUT_RECV_PKT_R {
83 SERIAL_OUT_RECV_PKT_R::new(((self.bits >> 2) & 1) != 0)
84 }
85 #[doc = "Bit 3 - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
86 #[inline(always)]
87 pub fn serial_in_empty(&self) -> SERIAL_IN_EMPTY_R {
88 SERIAL_IN_EMPTY_R::new(((self.bits >> 3) & 1) != 0)
89 }
90 #[doc = "Bit 4 - The raw interrupt bit turns to high level when pid error is detected."]
91 #[inline(always)]
92 pub fn pid_err(&self) -> PID_ERR_R {
93 PID_ERR_R::new(((self.bits >> 4) & 1) != 0)
94 }
95 #[doc = "Bit 5 - The raw interrupt bit turns to high level when CRC5 error is detected."]
96 #[inline(always)]
97 pub fn crc5_err(&self) -> CRC5_ERR_R {
98 CRC5_ERR_R::new(((self.bits >> 5) & 1) != 0)
99 }
100 #[doc = "Bit 6 - The raw interrupt bit turns to high level when CRC16 error is detected."]
101 #[inline(always)]
102 pub fn crc16_err(&self) -> CRC16_ERR_R {
103 CRC16_ERR_R::new(((self.bits >> 6) & 1) != 0)
104 }
105 #[doc = "Bit 7 - The raw interrupt bit turns to high level when stuff error is detected."]
106 #[inline(always)]
107 pub fn stuff_err(&self) -> STUFF_ERR_R {
108 STUFF_ERR_R::new(((self.bits >> 7) & 1) != 0)
109 }
110 #[doc = "Bit 8 - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
111 #[inline(always)]
112 pub fn in_token_rec_in_ep1(&self) -> IN_TOKEN_REC_IN_EP1_R {
113 IN_TOKEN_REC_IN_EP1_R::new(((self.bits >> 8) & 1) != 0)
114 }
115 #[doc = "Bit 9 - The raw interrupt bit turns to high level when usb bus reset is detected."]
116 #[inline(always)]
117 pub fn usb_bus_reset(&self) -> USB_BUS_RESET_R {
118 USB_BUS_RESET_R::new(((self.bits >> 9) & 1) != 0)
119 }
120 #[doc = "Bit 10 - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
121 #[inline(always)]
122 pub fn out_ep1_zero_payload(&self) -> OUT_EP1_ZERO_PAYLOAD_R {
123 OUT_EP1_ZERO_PAYLOAD_R::new(((self.bits >> 10) & 1) != 0)
124 }
125 #[doc = "Bit 11 - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
126 #[inline(always)]
127 pub fn out_ep2_zero_payload(&self) -> OUT_EP2_ZERO_PAYLOAD_R {
128 OUT_EP2_ZERO_PAYLOAD_R::new(((self.bits >> 11) & 1) != 0)
129 }
130 #[doc = "Bit 12 - The raw interrupt bit turns to high level when level of RTS from usb serial channel is changed."]
131 #[inline(always)]
132 pub fn rts_chg(&self) -> RTS_CHG_R {
133 RTS_CHG_R::new(((self.bits >> 12) & 1) != 0)
134 }
135 #[doc = "Bit 13 - The raw interrupt bit turns to high level when level of DTR from usb serial channel is changed."]
136 #[inline(always)]
137 pub fn dtr_chg(&self) -> DTR_CHG_R {
138 DTR_CHG_R::new(((self.bits >> 13) & 1) != 0)
139 }
140 #[doc = "Bit 14 - The raw interrupt bit turns to high level when level of GET LINE CODING request is received."]
141 #[inline(always)]
142 pub fn get_line_code(&self) -> GET_LINE_CODE_R {
143 GET_LINE_CODE_R::new(((self.bits >> 14) & 1) != 0)
144 }
145 #[doc = "Bit 15 - The raw interrupt bit turns to high level when level of SET LINE CODING request is received."]
146 #[inline(always)]
147 pub fn set_line_code(&self) -> SET_LINE_CODE_R {
148 SET_LINE_CODE_R::new(((self.bits >> 15) & 1) != 0)
149 }
150}
151#[cfg(feature = "impl-register-debug")]
152impl core::fmt::Debug for R {
153 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
154 f.debug_struct("INT_RAW")
155 .field("jtag_in_flush", &self.jtag_in_flush())
156 .field("sof", &self.sof())
157 .field("serial_out_recv_pkt", &self.serial_out_recv_pkt())
158 .field("serial_in_empty", &self.serial_in_empty())
159 .field("pid_err", &self.pid_err())
160 .field("crc5_err", &self.crc5_err())
161 .field("crc16_err", &self.crc16_err())
162 .field("stuff_err", &self.stuff_err())
163 .field("in_token_rec_in_ep1", &self.in_token_rec_in_ep1())
164 .field("usb_bus_reset", &self.usb_bus_reset())
165 .field("out_ep1_zero_payload", &self.out_ep1_zero_payload())
166 .field("out_ep2_zero_payload", &self.out_ep2_zero_payload())
167 .field("rts_chg", &self.rts_chg())
168 .field("dtr_chg", &self.dtr_chg())
169 .field("get_line_code", &self.get_line_code())
170 .field("set_line_code", &self.set_line_code())
171 .finish()
172 }
173}
174impl W {
175 #[doc = "Bit 0 - The raw interrupt bit turns to high level when flush cmd is received for IN endpoint 2 of JTAG."]
176 #[inline(always)]
177 pub fn jtag_in_flush(&mut self) -> JTAG_IN_FLUSH_W<INT_RAW_SPEC> {
178 JTAG_IN_FLUSH_W::new(self, 0)
179 }
180 #[doc = "Bit 1 - The raw interrupt bit turns to high level when SOF frame is received."]
181 #[inline(always)]
182 pub fn sof(&mut self) -> SOF_W<INT_RAW_SPEC> {
183 SOF_W::new(self, 1)
184 }
185 #[doc = "Bit 2 - The raw interrupt bit turns to high level when Serial Port OUT Endpoint received one packet."]
186 #[inline(always)]
187 pub fn serial_out_recv_pkt(&mut self) -> SERIAL_OUT_RECV_PKT_W<INT_RAW_SPEC> {
188 SERIAL_OUT_RECV_PKT_W::new(self, 2)
189 }
190 #[doc = "Bit 3 - The raw interrupt bit turns to high level when Serial Port IN Endpoint is empty."]
191 #[inline(always)]
192 pub fn serial_in_empty(&mut self) -> SERIAL_IN_EMPTY_W<INT_RAW_SPEC> {
193 SERIAL_IN_EMPTY_W::new(self, 3)
194 }
195 #[doc = "Bit 4 - The raw interrupt bit turns to high level when pid error is detected."]
196 #[inline(always)]
197 pub fn pid_err(&mut self) -> PID_ERR_W<INT_RAW_SPEC> {
198 PID_ERR_W::new(self, 4)
199 }
200 #[doc = "Bit 5 - The raw interrupt bit turns to high level when CRC5 error is detected."]
201 #[inline(always)]
202 pub fn crc5_err(&mut self) -> CRC5_ERR_W<INT_RAW_SPEC> {
203 CRC5_ERR_W::new(self, 5)
204 }
205 #[doc = "Bit 6 - The raw interrupt bit turns to high level when CRC16 error is detected."]
206 #[inline(always)]
207 pub fn crc16_err(&mut self) -> CRC16_ERR_W<INT_RAW_SPEC> {
208 CRC16_ERR_W::new(self, 6)
209 }
210 #[doc = "Bit 7 - The raw interrupt bit turns to high level when stuff error is detected."]
211 #[inline(always)]
212 pub fn stuff_err(&mut self) -> STUFF_ERR_W<INT_RAW_SPEC> {
213 STUFF_ERR_W::new(self, 7)
214 }
215 #[doc = "Bit 8 - The raw interrupt bit turns to high level when IN token for IN endpoint 1 is received."]
216 #[inline(always)]
217 pub fn in_token_rec_in_ep1(&mut self) -> IN_TOKEN_REC_IN_EP1_W<INT_RAW_SPEC> {
218 IN_TOKEN_REC_IN_EP1_W::new(self, 8)
219 }
220 #[doc = "Bit 9 - The raw interrupt bit turns to high level when usb bus reset is detected."]
221 #[inline(always)]
222 pub fn usb_bus_reset(&mut self) -> USB_BUS_RESET_W<INT_RAW_SPEC> {
223 USB_BUS_RESET_W::new(self, 9)
224 }
225 #[doc = "Bit 10 - The raw interrupt bit turns to high level when OUT endpoint 1 received packet with zero palyload."]
226 #[inline(always)]
227 pub fn out_ep1_zero_payload(&mut self) -> OUT_EP1_ZERO_PAYLOAD_W<INT_RAW_SPEC> {
228 OUT_EP1_ZERO_PAYLOAD_W::new(self, 10)
229 }
230 #[doc = "Bit 11 - The raw interrupt bit turns to high level when OUT endpoint 2 received packet with zero palyload."]
231 #[inline(always)]
232 pub fn out_ep2_zero_payload(&mut self) -> OUT_EP2_ZERO_PAYLOAD_W<INT_RAW_SPEC> {
233 OUT_EP2_ZERO_PAYLOAD_W::new(self, 11)
234 }
235 #[doc = "Bit 12 - The raw interrupt bit turns to high level when level of RTS from usb serial channel is changed."]
236 #[inline(always)]
237 pub fn rts_chg(&mut self) -> RTS_CHG_W<INT_RAW_SPEC> {
238 RTS_CHG_W::new(self, 12)
239 }
240 #[doc = "Bit 13 - The raw interrupt bit turns to high level when level of DTR from usb serial channel is changed."]
241 #[inline(always)]
242 pub fn dtr_chg(&mut self) -> DTR_CHG_W<INT_RAW_SPEC> {
243 DTR_CHG_W::new(self, 13)
244 }
245 #[doc = "Bit 14 - The raw interrupt bit turns to high level when level of GET LINE CODING request is received."]
246 #[inline(always)]
247 pub fn get_line_code(&mut self) -> GET_LINE_CODE_W<INT_RAW_SPEC> {
248 GET_LINE_CODE_W::new(self, 14)
249 }
250 #[doc = "Bit 15 - The raw interrupt bit turns to high level when level of SET LINE CODING request is received."]
251 #[inline(always)]
252 pub fn set_line_code(&mut self) -> SET_LINE_CODE_W<INT_RAW_SPEC> {
253 SET_LINE_CODE_W::new(self, 15)
254 }
255}
256#[doc = "Interrupt raw status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_raw::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
257pub struct INT_RAW_SPEC;
258impl crate::RegisterSpec for INT_RAW_SPEC {
259 type Ux = u32;
260}
261#[doc = "`read()` method returns [`int_raw::R`](R) reader structure"]
262impl crate::Readable for INT_RAW_SPEC {}
263#[doc = "`write(|w| ..)` method takes [`int_raw::W`](W) writer structure"]
264impl crate::Writable for INT_RAW_SPEC {
265 type Safety = crate::Unsafe;
266 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
267 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
268}
269#[doc = "`reset()` method sets INT_RAW to value 0x08"]
270impl crate::Resettable for INT_RAW_SPEC {
271 const RESET_VALUE: u32 = 0x08;
272}