esp32c6/uhci0/
rx_head.rs

1#[doc = "Register `RX_HEAD` reader"]
2pub type R = crate::R<RX_HEAD_SPEC>;
3#[doc = "Field `RX_HEAD` reader - Stores the head of received packet."]
4pub type RX_HEAD_R = crate::FieldReader<u32>;
5impl R {
6    #[doc = "Bits 0:31 - Stores the head of received packet."]
7    #[inline(always)]
8    pub fn rx_head(&self) -> RX_HEAD_R {
9        RX_HEAD_R::new(self.bits)
10    }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("RX_HEAD")
16            .field("rx_head", &self.rx_head())
17            .finish()
18    }
19}
20#[doc = "UHCI Head Register\n\nYou can [`read`](crate::Reg::read) this register and get [`rx_head::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct RX_HEAD_SPEC;
22impl crate::RegisterSpec for RX_HEAD_SPEC {
23    type Ux = u32;
24}
25#[doc = "`read()` method returns [`rx_head::R`](R) reader structure"]
26impl crate::Readable for RX_HEAD_SPEC {}
27#[doc = "`reset()` method sets RX_HEAD to value 0"]
28impl crate::Resettable for RX_HEAD_SPEC {
29    const RESET_VALUE: u32 = 0;
30}