esp32c6/pmu/
power_wait_timer1.rs

1#[doc = "Register `POWER_WAIT_TIMER1` reader"]
2pub type R = crate::R<POWER_WAIT_TIMER1_SPEC>;
3#[doc = "Register `POWER_WAIT_TIMER1` writer"]
4pub type W = crate::W<POWER_WAIT_TIMER1_SPEC>;
5#[doc = "Field `DG_LP_POWERDOWN_TIMER` reader - need_des"]
6pub type DG_LP_POWERDOWN_TIMER_R = crate::FieldReader;
7#[doc = "Field `DG_LP_POWERDOWN_TIMER` writer - need_des"]
8pub type DG_LP_POWERDOWN_TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
9#[doc = "Field `DG_LP_POWERUP_TIMER` reader - need_des"]
10pub type DG_LP_POWERUP_TIMER_R = crate::FieldReader;
11#[doc = "Field `DG_LP_POWERUP_TIMER` writer - need_des"]
12pub type DG_LP_POWERUP_TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
13#[doc = "Field `DG_LP_WAIT_TIMER` reader - need_des"]
14pub type DG_LP_WAIT_TIMER_R = crate::FieldReader<u16>;
15#[doc = "Field `DG_LP_WAIT_TIMER` writer - need_des"]
16pub type DG_LP_WAIT_TIMER_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
17impl R {
18    #[doc = "Bits 9:15 - need_des"]
19    #[inline(always)]
20    pub fn dg_lp_powerdown_timer(&self) -> DG_LP_POWERDOWN_TIMER_R {
21        DG_LP_POWERDOWN_TIMER_R::new(((self.bits >> 9) & 0x7f) as u8)
22    }
23    #[doc = "Bits 16:22 - need_des"]
24    #[inline(always)]
25    pub fn dg_lp_powerup_timer(&self) -> DG_LP_POWERUP_TIMER_R {
26        DG_LP_POWERUP_TIMER_R::new(((self.bits >> 16) & 0x7f) as u8)
27    }
28    #[doc = "Bits 23:31 - need_des"]
29    #[inline(always)]
30    pub fn dg_lp_wait_timer(&self) -> DG_LP_WAIT_TIMER_R {
31        DG_LP_WAIT_TIMER_R::new(((self.bits >> 23) & 0x01ff) as u16)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("POWER_WAIT_TIMER1")
38            .field("dg_lp_powerdown_timer", &self.dg_lp_powerdown_timer())
39            .field("dg_lp_powerup_timer", &self.dg_lp_powerup_timer())
40            .field("dg_lp_wait_timer", &self.dg_lp_wait_timer())
41            .finish()
42    }
43}
44impl W {
45    #[doc = "Bits 9:15 - need_des"]
46    #[inline(always)]
47    pub fn dg_lp_powerdown_timer(&mut self) -> DG_LP_POWERDOWN_TIMER_W<POWER_WAIT_TIMER1_SPEC> {
48        DG_LP_POWERDOWN_TIMER_W::new(self, 9)
49    }
50    #[doc = "Bits 16:22 - need_des"]
51    #[inline(always)]
52    pub fn dg_lp_powerup_timer(&mut self) -> DG_LP_POWERUP_TIMER_W<POWER_WAIT_TIMER1_SPEC> {
53        DG_LP_POWERUP_TIMER_W::new(self, 16)
54    }
55    #[doc = "Bits 23:31 - need_des"]
56    #[inline(always)]
57    pub fn dg_lp_wait_timer(&mut self) -> DG_LP_WAIT_TIMER_W<POWER_WAIT_TIMER1_SPEC> {
58        DG_LP_WAIT_TIMER_W::new(self, 23)
59    }
60}
61#[doc = "need_des\n\nYou can [`read`](crate::Reg::read) this register and get [`power_wait_timer1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`power_wait_timer1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct POWER_WAIT_TIMER1_SPEC;
63impl crate::RegisterSpec for POWER_WAIT_TIMER1_SPEC {
64    type Ux = u32;
65}
66#[doc = "`read()` method returns [`power_wait_timer1::R`](R) reader structure"]
67impl crate::Readable for POWER_WAIT_TIMER1_SPEC {}
68#[doc = "`write(|w| ..)` method takes [`power_wait_timer1::W`](W) writer structure"]
69impl crate::Writable for POWER_WAIT_TIMER1_SPEC {
70    type Safety = crate::Unsafe;
71    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
73}
74#[doc = "`reset()` method sets POWER_WAIT_TIMER1 to value 0x7fff_fe00"]
75impl crate::Resettable for POWER_WAIT_TIMER1_SPEC {
76    const RESET_VALUE: u32 = 0x7fff_fe00;
77}
esp32c6/pmu/power_wait_timer1.rs

esp32c6/pmu/
power_wait_timer1.rs
