1#[doc = "Register `CFG_DATA1` reader"]
2pub type R = crate::R<CFG_DATA1_SPEC>;
3#[doc = "Register `CFG_DATA1` writer"]
4pub type W = crate::W<CFG_DATA1_SPEC>;
5#[doc = "Field `SDIO_ENABLE` reader - Sdio clock enable"]
6pub type SDIO_ENABLE_R = crate::BitReader;
7#[doc = "Field `SDIO_ENABLE` writer - Sdio clock enable"]
8pub type SDIO_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SDIO_IOREADY1` reader - sdio function1 io ready signal in cis"]
10pub type SDIO_IOREADY1_R = crate::BitReader;
11#[doc = "Field `SDIO_IOREADY1` writer - sdio function1 io ready signal in cis"]
12pub type SDIO_IOREADY1_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `HIGHSPEED_ENABLE` reader - Highspeed enable in cccr"]
14pub type HIGHSPEED_ENABLE_R = crate::BitReader;
15#[doc = "Field `HIGHSPEED_ENABLE` writer - Highspeed enable in cccr"]
16pub type HIGHSPEED_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `HIGHSPEED_MODE` reader - highspeed mode status in cccr"]
18pub type HIGHSPEED_MODE_R = crate::BitReader;
19#[doc = "Field `SDIO_CD_ENABLE` reader - sdio card detect enable"]
20pub type SDIO_CD_ENABLE_R = crate::BitReader;
21#[doc = "Field `SDIO_CD_ENABLE` writer - sdio card detect enable"]
22pub type SDIO_CD_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `SDIO_IOREADY2` reader - sdio function1 io ready signal in cis"]
24pub type SDIO_IOREADY2_R = crate::BitReader;
25#[doc = "Field `SDIO_IOREADY2` writer - sdio function1 io ready signal in cis"]
26pub type SDIO_IOREADY2_W<'a, REG> = crate::BitWriter<'a, REG>;
27#[doc = "Field `SDIO_INT_MASK` reader - mask sdio interrupt in cccr, high active"]
28pub type SDIO_INT_MASK_R = crate::BitReader;
29#[doc = "Field `SDIO_INT_MASK` writer - mask sdio interrupt in cccr, high active"]
30pub type SDIO_INT_MASK_W<'a, REG> = crate::BitWriter<'a, REG>;
31#[doc = "Field `IOENABLE2` reader - ioe2 status in cccr"]
32pub type IOENABLE2_R = crate::BitReader;
33#[doc = "Field `CD_DISABLE` reader - card disable status in cccr"]
34pub type CD_DISABLE_R = crate::BitReader;
35#[doc = "Field `FUNC1_EPS` reader - function1 eps status in fbr"]
36pub type FUNC1_EPS_R = crate::BitReader;
37#[doc = "Field `EMP` reader - empc status in cccr"]
38pub type EMP_R = crate::BitReader;
39#[doc = "Field `IOENABLE1` reader - ioe1 status in cccr"]
40pub type IOENABLE1_R = crate::BitReader;
41#[doc = "Field `SDIO_VER` reader - sdio version in cccr"]
42pub type SDIO_VER_R = crate::FieldReader<u16>;
43#[doc = "Field `SDIO_VER` writer - sdio version in cccr"]
44pub type SDIO_VER_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
45#[doc = "Field `FUNC2_EPS` reader - function2 eps status in fbr"]
46pub type FUNC2_EPS_R = crate::BitReader;
47#[doc = "Field `SDIO20_CONF` reader - 29\\],sdio negedge sample enablel.\\[30\\],sdio posedge sample enable.\\[31\\],sdio cmd/dat in delayed cycles control,0:no delay, 1:delay 1 cycle. \\[25\\]: sdio1.1 dat/cmd sending out edge control,1:negedge,0:posedge when highseed mode. \\[26\\]: sdio2.0 dat/cmd sending out edge control,1:negedge when \\[12\\]=0,0:negedge when \\[12\\]=0,posedge when highspeed mode enable. \\[27\\]: sdio interrupt sending out delay control,1:delay one cycle, 0: no delay. \\[28\\]: sdio data pad pull up enable"]
48pub type SDIO20_CONF_R = crate::FieldReader;
49#[doc = "Field `SDIO20_CONF` writer - 29\\],sdio negedge sample enablel.\\[30\\],sdio posedge sample enable.\\[31\\],sdio cmd/dat in delayed cycles control,0:no delay, 1:delay 1 cycle. \\[25\\]: sdio1.1 dat/cmd sending out edge control,1:negedge,0:posedge when highseed mode. \\[26\\]: sdio2.0 dat/cmd sending out edge control,1:negedge when \\[12\\]=0,0:negedge when \\[12\\]=0,posedge when highspeed mode enable. \\[27\\]: sdio interrupt sending out delay control,1:delay one cycle, 0: no delay. \\[28\\]: sdio data pad pull up enable"]
50pub type SDIO20_CONF_W<'a, REG> = crate::FieldWriter<'a, REG, 7>;
51impl R {
52 #[doc = "Bit 0 - Sdio clock enable"]
53 #[inline(always)]
54 pub fn sdio_enable(&self) -> SDIO_ENABLE_R {
55 SDIO_ENABLE_R::new((self.bits & 1) != 0)
56 }
57 #[doc = "Bit 1 - sdio function1 io ready signal in cis"]
58 #[inline(always)]
59 pub fn sdio_ioready1(&self) -> SDIO_IOREADY1_R {
60 SDIO_IOREADY1_R::new(((self.bits >> 1) & 1) != 0)
61 }
62 #[doc = "Bit 2 - Highspeed enable in cccr"]
63 #[inline(always)]
64 pub fn highspeed_enable(&self) -> HIGHSPEED_ENABLE_R {
65 HIGHSPEED_ENABLE_R::new(((self.bits >> 2) & 1) != 0)
66 }
67 #[doc = "Bit 3 - highspeed mode status in cccr"]
68 #[inline(always)]
69 pub fn highspeed_mode(&self) -> HIGHSPEED_MODE_R {
70 HIGHSPEED_MODE_R::new(((self.bits >> 3) & 1) != 0)
71 }
72 #[doc = "Bit 4 - sdio card detect enable"]
73 #[inline(always)]
74 pub fn sdio_cd_enable(&self) -> SDIO_CD_ENABLE_R {
75 SDIO_CD_ENABLE_R::new(((self.bits >> 4) & 1) != 0)
76 }
77 #[doc = "Bit 5 - sdio function1 io ready signal in cis"]
78 #[inline(always)]
79 pub fn sdio_ioready2(&self) -> SDIO_IOREADY2_R {
80 SDIO_IOREADY2_R::new(((self.bits >> 5) & 1) != 0)
81 }
82 #[doc = "Bit 6 - mask sdio interrupt in cccr, high active"]
83 #[inline(always)]
84 pub fn sdio_int_mask(&self) -> SDIO_INT_MASK_R {
85 SDIO_INT_MASK_R::new(((self.bits >> 6) & 1) != 0)
86 }
87 #[doc = "Bit 7 - ioe2 status in cccr"]
88 #[inline(always)]
89 pub fn ioenable2(&self) -> IOENABLE2_R {
90 IOENABLE2_R::new(((self.bits >> 7) & 1) != 0)
91 }
92 #[doc = "Bit 8 - card disable status in cccr"]
93 #[inline(always)]
94 pub fn cd_disable(&self) -> CD_DISABLE_R {
95 CD_DISABLE_R::new(((self.bits >> 8) & 1) != 0)
96 }
97 #[doc = "Bit 9 - function1 eps status in fbr"]
98 #[inline(always)]
99 pub fn func1_eps(&self) -> FUNC1_EPS_R {
100 FUNC1_EPS_R::new(((self.bits >> 9) & 1) != 0)
101 }
102 #[doc = "Bit 10 - empc status in cccr"]
103 #[inline(always)]
104 pub fn emp(&self) -> EMP_R {
105 EMP_R::new(((self.bits >> 10) & 1) != 0)
106 }
107 #[doc = "Bit 11 - ioe1 status in cccr"]
108 #[inline(always)]
109 pub fn ioenable1(&self) -> IOENABLE1_R {
110 IOENABLE1_R::new(((self.bits >> 11) & 1) != 0)
111 }
112 #[doc = "Bits 12:23 - sdio version in cccr"]
113 #[inline(always)]
114 pub fn sdio_ver(&self) -> SDIO_VER_R {
115 SDIO_VER_R::new(((self.bits >> 12) & 0x0fff) as u16)
116 }
117 #[doc = "Bit 24 - function2 eps status in fbr"]
118 #[inline(always)]
119 pub fn func2_eps(&self) -> FUNC2_EPS_R {
120 FUNC2_EPS_R::new(((self.bits >> 24) & 1) != 0)
121 }
122 #[doc = "Bits 25:31 - 29\\],sdio negedge sample enablel.\\[30\\],sdio posedge sample enable.\\[31\\],sdio cmd/dat in delayed cycles control,0:no delay, 1:delay 1 cycle. \\[25\\]: sdio1.1 dat/cmd sending out edge control,1:negedge,0:posedge when highseed mode. \\[26\\]: sdio2.0 dat/cmd sending out edge control,1:negedge when \\[12\\]=0,0:negedge when \\[12\\]=0,posedge when highspeed mode enable. \\[27\\]: sdio interrupt sending out delay control,1:delay one cycle, 0: no delay. \\[28\\]: sdio data pad pull up enable"]
123 #[inline(always)]
124 pub fn sdio20_conf(&self) -> SDIO20_CONF_R {
125 SDIO20_CONF_R::new(((self.bits >> 25) & 0x7f) as u8)
126 }
127}
128#[cfg(feature = "impl-register-debug")]
129impl core::fmt::Debug for R {
130 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
131 f.debug_struct("CFG_DATA1")
132 .field("sdio_enable", &self.sdio_enable())
133 .field("sdio_ioready1", &self.sdio_ioready1())
134 .field("highspeed_enable", &self.highspeed_enable())
135 .field("highspeed_mode", &self.highspeed_mode())
136 .field("sdio_cd_enable", &self.sdio_cd_enable())
137 .field("sdio_ioready2", &self.sdio_ioready2())
138 .field("sdio_int_mask", &self.sdio_int_mask())
139 .field("ioenable2", &self.ioenable2())
140 .field("cd_disable", &self.cd_disable())
141 .field("func1_eps", &self.func1_eps())
142 .field("emp", &self.emp())
143 .field("ioenable1", &self.ioenable1())
144 .field("sdio_ver", &self.sdio_ver())
145 .field("func2_eps", &self.func2_eps())
146 .field("sdio20_conf", &self.sdio20_conf())
147 .finish()
148 }
149}
150impl W {
151 #[doc = "Bit 0 - Sdio clock enable"]
152 #[inline(always)]
153 pub fn sdio_enable(&mut self) -> SDIO_ENABLE_W<CFG_DATA1_SPEC> {
154 SDIO_ENABLE_W::new(self, 0)
155 }
156 #[doc = "Bit 1 - sdio function1 io ready signal in cis"]
157 #[inline(always)]
158 pub fn sdio_ioready1(&mut self) -> SDIO_IOREADY1_W<CFG_DATA1_SPEC> {
159 SDIO_IOREADY1_W::new(self, 1)
160 }
161 #[doc = "Bit 2 - Highspeed enable in cccr"]
162 #[inline(always)]
163 pub fn highspeed_enable(&mut self) -> HIGHSPEED_ENABLE_W<CFG_DATA1_SPEC> {
164 HIGHSPEED_ENABLE_W::new(self, 2)
165 }
166 #[doc = "Bit 4 - sdio card detect enable"]
167 #[inline(always)]
168 pub fn sdio_cd_enable(&mut self) -> SDIO_CD_ENABLE_W<CFG_DATA1_SPEC> {
169 SDIO_CD_ENABLE_W::new(self, 4)
170 }
171 #[doc = "Bit 5 - sdio function1 io ready signal in cis"]
172 #[inline(always)]
173 pub fn sdio_ioready2(&mut self) -> SDIO_IOREADY2_W<CFG_DATA1_SPEC> {
174 SDIO_IOREADY2_W::new(self, 5)
175 }
176 #[doc = "Bit 6 - mask sdio interrupt in cccr, high active"]
177 #[inline(always)]
178 pub fn sdio_int_mask(&mut self) -> SDIO_INT_MASK_W<CFG_DATA1_SPEC> {
179 SDIO_INT_MASK_W::new(self, 6)
180 }
181 #[doc = "Bits 12:23 - sdio version in cccr"]
182 #[inline(always)]
183 pub fn sdio_ver(&mut self) -> SDIO_VER_W<CFG_DATA1_SPEC> {
184 SDIO_VER_W::new(self, 12)
185 }
186 #[doc = "Bits 25:31 - 29\\],sdio negedge sample enablel.\\[30\\],sdio posedge sample enable.\\[31\\],sdio cmd/dat in delayed cycles control,0:no delay, 1:delay 1 cycle. \\[25\\]: sdio1.1 dat/cmd sending out edge control,1:negedge,0:posedge when highseed mode. \\[26\\]: sdio2.0 dat/cmd sending out edge control,1:negedge when \\[12\\]=0,0:negedge when \\[12\\]=0,posedge when highspeed mode enable. \\[27\\]: sdio interrupt sending out delay control,1:delay one cycle, 0: no delay. \\[28\\]: sdio data pad pull up enable"]
187 #[inline(always)]
188 pub fn sdio20_conf(&mut self) -> SDIO20_CONF_W<CFG_DATA1_SPEC> {
189 SDIO20_CONF_W::new(self, 25)
190 }
191}
192#[doc = "SDIO configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg_data1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg_data1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
193pub struct CFG_DATA1_SPEC;
194impl crate::RegisterSpec for CFG_DATA1_SPEC {
195 type Ux = u32;
196}
197#[doc = "`read()` method returns [`cfg_data1::R`](R) reader structure"]
198impl crate::Readable for CFG_DATA1_SPEC {}
199#[doc = "`write(|w| ..)` method takes [`cfg_data1::W`](W) writer structure"]
200impl crate::Writable for CFG_DATA1_SPEC {
201 type Safety = crate::Unsafe;
202 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
203 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
204}
205#[doc = "`reset()` method sets CFG_DATA1 to value 0x0023_2011"]
206impl crate::Resettable for CFG_DATA1_SPEC {
207 const RESET_VALUE: u32 = 0x0023_2011;
208}