esp32c6/extmem/
l1_unallocate_buffer_clear.rs

1#[doc = "Register `L1_UNALLOCATE_BUFFER_CLEAR` reader"]
2pub type R = crate::R<L1_UNALLOCATE_BUFFER_CLEAR_SPEC>;
3#[doc = "Register `L1_UNALLOCATE_BUFFER_CLEAR` writer"]
4pub type W = crate::W<L1_UNALLOCATE_BUFFER_CLEAR_SPEC>;
5#[doc = "Field `L1_ICACHE0_UNALLOC_CLR` reader - The bit is used to clear the unallocate request buffer of l1 icache0 where the unallocate request is responsed but not completed."]
6pub type L1_ICACHE0_UNALLOC_CLR_R = crate::BitReader;
7#[doc = "Field `L1_ICACHE1_UNALLOC_CLR` reader - The bit is used to clear the unallocate request buffer of l1 icache1 where the unallocate request is responsed but not completed."]
8pub type L1_ICACHE1_UNALLOC_CLR_R = crate::BitReader;
9#[doc = "Field `L1_ICACHE2_UNALLOC_CLR` reader - Reserved"]
10pub type L1_ICACHE2_UNALLOC_CLR_R = crate::BitReader;
11#[doc = "Field `L1_ICACHE3_UNALLOC_CLR` reader - Reserved"]
12pub type L1_ICACHE3_UNALLOC_CLR_R = crate::BitReader;
13#[doc = "Field `L1_CACHE_UNALLOC_CLR` reader - The bit is used to clear the unallocate request buffer of l1 cache where the unallocate request is responsed but not completed."]
14pub type L1_CACHE_UNALLOC_CLR_R = crate::BitReader;
15#[doc = "Field `L1_CACHE_UNALLOC_CLR` writer - The bit is used to clear the unallocate request buffer of l1 cache where the unallocate request is responsed but not completed."]
16pub type L1_CACHE_UNALLOC_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 0 - The bit is used to clear the unallocate request buffer of l1 icache0 where the unallocate request is responsed but not completed."]
19    #[inline(always)]
20    pub fn l1_icache0_unalloc_clr(&self) -> L1_ICACHE0_UNALLOC_CLR_R {
21        L1_ICACHE0_UNALLOC_CLR_R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - The bit is used to clear the unallocate request buffer of l1 icache1 where the unallocate request is responsed but not completed."]
24    #[inline(always)]
25    pub fn l1_icache1_unalloc_clr(&self) -> L1_ICACHE1_UNALLOC_CLR_R {
26        L1_ICACHE1_UNALLOC_CLR_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bit 2 - Reserved"]
29    #[inline(always)]
30    pub fn l1_icache2_unalloc_clr(&self) -> L1_ICACHE2_UNALLOC_CLR_R {
31        L1_ICACHE2_UNALLOC_CLR_R::new(((self.bits >> 2) & 1) != 0)
32    }
33    #[doc = "Bit 3 - Reserved"]
34    #[inline(always)]
35    pub fn l1_icache3_unalloc_clr(&self) -> L1_ICACHE3_UNALLOC_CLR_R {
36        L1_ICACHE3_UNALLOC_CLR_R::new(((self.bits >> 3) & 1) != 0)
37    }
38    #[doc = "Bit 4 - The bit is used to clear the unallocate request buffer of l1 cache where the unallocate request is responsed but not completed."]
39    #[inline(always)]
40    pub fn l1_cache_unalloc_clr(&self) -> L1_CACHE_UNALLOC_CLR_R {
41        L1_CACHE_UNALLOC_CLR_R::new(((self.bits >> 4) & 1) != 0)
42    }
43}
44#[cfg(feature = "impl-register-debug")]
45impl core::fmt::Debug for R {
46    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
47        f.debug_struct("L1_UNALLOCATE_BUFFER_CLEAR")
48            .field("l1_icache0_unalloc_clr", &self.l1_icache0_unalloc_clr())
49            .field("l1_icache1_unalloc_clr", &self.l1_icache1_unalloc_clr())
50            .field("l1_icache2_unalloc_clr", &self.l1_icache2_unalloc_clr())
51            .field("l1_icache3_unalloc_clr", &self.l1_icache3_unalloc_clr())
52            .field("l1_cache_unalloc_clr", &self.l1_cache_unalloc_clr())
53            .finish()
54    }
55}
56impl W {
57    #[doc = "Bit 4 - The bit is used to clear the unallocate request buffer of l1 cache where the unallocate request is responsed but not completed."]
58    #[inline(always)]
59    pub fn l1_cache_unalloc_clr(
60        &mut self,
61    ) -> L1_CACHE_UNALLOC_CLR_W<L1_UNALLOCATE_BUFFER_CLEAR_SPEC> {
62        L1_CACHE_UNALLOC_CLR_W::new(self, 4)
63    }
64}
65#[doc = "Unallocate request buffer clear registers\n\nYou can [`read`](crate::Reg::read) this register and get [`l1_unallocate_buffer_clear::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`l1_unallocate_buffer_clear::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
66pub struct L1_UNALLOCATE_BUFFER_CLEAR_SPEC;
67impl crate::RegisterSpec for L1_UNALLOCATE_BUFFER_CLEAR_SPEC {
68    type Ux = u32;
69}
70#[doc = "`read()` method returns [`l1_unallocate_buffer_clear::R`](R) reader structure"]
71impl crate::Readable for L1_UNALLOCATE_BUFFER_CLEAR_SPEC {}
72#[doc = "`write(|w| ..)` method takes [`l1_unallocate_buffer_clear::W`](W) writer structure"]
73impl crate::Writable for L1_UNALLOCATE_BUFFER_CLEAR_SPEC {
74    type Safety = crate::Unsafe;
75    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
76    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
77}
78#[doc = "`reset()` method sets L1_UNALLOCATE_BUFFER_CLEAR to value 0"]
79impl crate::Resettable for L1_UNALLOCATE_BUFFER_CLEAR_SPEC {
80    const RESET_VALUE: u32 = 0;
81}
esp32c6/extmem/l1_unallocate_buffer_clear.rs

esp32c6/extmem/
l1_unallocate_buffer_clear.rs
