esp32c6/lp_timer/
main_overflow.rs

1#[doc = "Register `MAIN_OVERFLOW` writer"]
2pub type W = crate::W<MAIN_OVERFLOW_SPEC>;
3#[doc = "Field `MAIN_TIMER_ALARM_LOAD` writer - need_des"]
4pub type MAIN_TIMER_ALARM_LOAD_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[cfg(feature = "impl-register-debug")]
6impl core::fmt::Debug for crate::generic::Reg<MAIN_OVERFLOW_SPEC> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bit 31 - need_des"]
13    #[inline(always)]
14    pub fn main_timer_alarm_load(&mut self) -> MAIN_TIMER_ALARM_LOAD_W<MAIN_OVERFLOW_SPEC> {
15        MAIN_TIMER_ALARM_LOAD_W::new(self, 31)
16    }
17}
18#[doc = "need_des\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`main_overflow::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct MAIN_OVERFLOW_SPEC;
20impl crate::RegisterSpec for MAIN_OVERFLOW_SPEC {
21    type Ux = u32;
22}
23#[doc = "`write(|w| ..)` method takes [`main_overflow::W`](W) writer structure"]
24impl crate::Writable for MAIN_OVERFLOW_SPEC {
25    type Safety = crate::Unsafe;
26}
27#[doc = "`reset()` method sets MAIN_OVERFLOW to value 0"]
28impl crate::Resettable for MAIN_OVERFLOW_SPEC {}
esp32c6/lp_timer/main_overflow.rs

esp32c6/lp_timer/
main_overflow.rs
