esp32c6/lp_apm/
int_en.rs

1#[doc = "Register `INT_EN` reader"]
2pub type R = crate::R<INT_EN_SPEC>;
3#[doc = "Register `INT_EN` writer"]
4pub type W = crate::W<INT_EN_SPEC>;
5#[doc = "Field `M_APM(0-1)` reader - APM M%s interrupt enable"]
6pub type M_APM_R = crate::BitReader;
7#[doc = "Field `M_APM(0-1)` writer - APM M%s interrupt enable"]
8pub type M_APM_W<'a, REG> = crate::BitWriter<'a, REG>;
9impl R {
10    #[doc = "APM M(0-1) interrupt enable"]
11    #[doc = ""]
12    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `M0_APM` field.</div>"]
13    #[inline(always)]
14    pub fn m_apm(&self, n: u8) -> M_APM_R {
15        #[allow(clippy::no_effect)]
16        [(); 2][n as usize];
17        M_APM_R::new(((self.bits >> n) & 1) != 0)
18    }
19    #[doc = "Iterator for array of:"]
20    #[doc = "APM M(0-1) interrupt enable"]
21    #[inline(always)]
22    pub fn m_apm_iter(&self) -> impl Iterator<Item = M_APM_R> + '_ {
23        (0..2).map(move |n| M_APM_R::new(((self.bits >> n) & 1) != 0))
24    }
25    #[doc = "Bit 0 - APM M0 interrupt enable"]
26    #[inline(always)]
27    pub fn m0_apm(&self) -> M_APM_R {
28        M_APM_R::new((self.bits & 1) != 0)
29    }
30    #[doc = "Bit 1 - APM M1 interrupt enable"]
31    #[inline(always)]
32    pub fn m1_apm(&self) -> M_APM_R {
33        M_APM_R::new(((self.bits >> 1) & 1) != 0)
34    }
35}
36#[cfg(feature = "impl-register-debug")]
37impl core::fmt::Debug for R {
38    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
39        f.debug_struct("INT_EN")
40            .field("m0_apm", &self.m0_apm())
41            .field("m1_apm", &self.m1_apm())
42            .finish()
43    }
44}
45impl W {
46    #[doc = "APM M(0-1) interrupt enable"]
47    #[doc = ""]
48    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `M0_APM` field.</div>"]
49    #[inline(always)]
50    pub fn m_apm(&mut self, n: u8) -> M_APM_W<INT_EN_SPEC> {
51        #[allow(clippy::no_effect)]
52        [(); 2][n as usize];
53        M_APM_W::new(self, n)
54    }
55    #[doc = "Bit 0 - APM M0 interrupt enable"]
56    #[inline(always)]
57    pub fn m0_apm(&mut self) -> M_APM_W<INT_EN_SPEC> {
58        M_APM_W::new(self, 0)
59    }
60    #[doc = "Bit 1 - APM M1 interrupt enable"]
61    #[inline(always)]
62    pub fn m1_apm(&mut self) -> M_APM_W<INT_EN_SPEC> {
63        M_APM_W::new(self, 1)
64    }
65}
66#[doc = "APM interrupt enable register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
67pub struct INT_EN_SPEC;
68impl crate::RegisterSpec for INT_EN_SPEC {
69    type Ux = u32;
70}
71#[doc = "`read()` method returns [`int_en::R`](R) reader structure"]
72impl crate::Readable for INT_EN_SPEC {}
73#[doc = "`write(|w| ..)` method takes [`int_en::W`](W) writer structure"]
74impl crate::Writable for INT_EN_SPEC {
75    type Safety = crate::Unsafe;
76    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
77    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
78}
79#[doc = "`reset()` method sets INT_EN to value 0"]
80impl crate::Resettable for INT_EN_SPEC {
81    const RESET_VALUE: u32 = 0;
82}
esp32c6/lp_apm/int_en.rs

esp32c6/lp_apm/
int_en.rs
