Module ch_rx_conf1

Channel %s configure register 1

Structs

CH_RX_CONF1_SPEC

Channel %s configure register 1

Type Aliases

AFIFO_RST_W

Field AFIFO_RST writer - Reserved

APB_MEM_RST_W

Field APB_MEM_RST writer - Set this bit to reset W/R ram address for CHANNEL%s by accessing apb fifo.

CONF_UPDATE_W

Field CONF_UPDATE writer - synchronization bit for CHANNEL%s

MEM_OWNER_R

Field MEM_OWNER reader - This register marks the ownership of CHANNEL%s’s ram block. 1’h1: Receiver is using the ram. 1’h0: APB bus is using the ram.

MEM_OWNER_W

Field MEM_OWNER writer - This register marks the ownership of CHANNEL%s’s ram block. 1’h1: Receiver is using the ram. 1’h0: APB bus is using the ram.

MEM_RX_WRAP_EN_R

Field MEM_RX_WRAP_EN reader - This is the channel %s enable bit for wraparound mode: it will resume receiving at the start when the data to be received is more than its memory size.

MEM_RX_WRAP_EN_W

Field MEM_RX_WRAP_EN writer - This is the channel %s enable bit for wraparound mode: it will resume receiving at the start when the data to be received is more than its memory size.

MEM_WR_RST_W

Field MEM_WR_RST writer - Set this bit to reset write ram address for CHANNEL%s by accessing receiver.

R

Register CH%s_RX_CONF1 reader

RX_EN_R

Field RX_EN reader - Set this bit to enable receiver to receive data on CHANNEL%s.

RX_EN_W

Field RX_EN writer - Set this bit to enable receiver to receive data on CHANNEL%s.

RX_FILTER_EN_R

Field RX_FILTER_EN reader - This is the receive filter’s enable bit for CHANNEL%s.

RX_FILTER_EN_W

Field RX_FILTER_EN writer - This is the receive filter’s enable bit for CHANNEL%s.

RX_FILTER_THRES_R

Field RX_FILTER_THRES reader - Ignores the input pulse when its width is smaller than this register value in APB clock periods (in receive mode).

RX_FILTER_THRES_W

Field RX_FILTER_THRES writer - Ignores the input pulse when its width is smaller than this register value in APB clock periods (in receive mode).

W

Register CH%s_RX_CONF1 writer