Module scl_start_hold

Configures the delay between the SDA and SCL negative edge for a start condition

Structs

SCL_START_HOLD_SPEC

Configures the delay between the SDA and SCL negative edge for a start condition

Type Aliases

R

Register SCL_START_HOLD reader

TIME_R

Field TIME reader - This register is used to configure the time between the negative edge of SDA and the negative edge of SCL for a START condition, in I2C module clock cycles.

TIME_W

Field TIME writer - This register is used to configure the time between the negative edge of SDA and the negative edge of SCL for a START condition, in I2C module clock cycles.

W

Register SCL_START_HOLD writer