Module l1_cache_ctrl

Source
Expand description

L1 data Cache(L1-Cache) control register

Structs§

L1_CACHE_CTRL_SPEC
L1 data Cache(L1-Cache) control register

Type Aliases§

L1_CACHE_SHUT_BUS0_R
Field L1_CACHE_SHUT_BUS0 reader - The bit is used to disable core0 dbus access L1-Cache, 0: enable, 1: disable
L1_CACHE_SHUT_BUS0_W
Field L1_CACHE_SHUT_BUS0 writer - The bit is used to disable core0 dbus access L1-Cache, 0: enable, 1: disable
L1_CACHE_SHUT_BUS1_R
Field L1_CACHE_SHUT_BUS1 reader - The bit is used to disable core1 dbus access L1-Cache, 0: enable, 1: disable
L1_CACHE_SHUT_BUS1_W
Field L1_CACHE_SHUT_BUS1 writer - The bit is used to disable core1 dbus access L1-Cache, 0: enable, 1: disable
L1_CACHE_SHUT_DBUS2_R
Field L1_CACHE_SHUT_DBUS2 reader - Reserved
L1_CACHE_SHUT_DBUS3_R
Field L1_CACHE_SHUT_DBUS3 reader - Reserved
L1_CACHE_SHUT_DMA_R
Field L1_CACHE_SHUT_DMA reader - The bit is used to disable DMA access L1-Cache, 0: enable, 1: disable
L1_CACHE_UNDEF_OP_R
Field L1_CACHE_UNDEF_OP reader - Reserved
L1_CACHE_UNDEF_OP_W
Field L1_CACHE_UNDEF_OP writer - Reserved
R
Register L1_CACHE_CTRL reader
W
Register L1_CACHE_CTRL writer