Expand description
L1-Cache Access Fail Interrupt clear register
Structs§
- L1_
CACHE_ ACS_ FAIL_ INT_ CLR_ SPEC - L1-Cache Access Fail Interrupt clear register
Type Aliases§
- L1_
CACHE_ FAIL_ INT_ CLR_ W - Field
L1_CACHE_FAIL_INT_CLR
writer - The bit is used to clear interrupt of access fail that occurs in L1-DCache due to cpu accesses L1-DCache. - L1_
ICACH E0_ FAIL_ INT_ CLR_ R - Field
L1_ICACHE0_FAIL_INT_CLR
reader - The bit is used to clear interrupt of access fail that occurs in L1-ICache0 due to cpu accesses L1-ICache0. - L1_
ICACH E1_ FAIL_ INT_ CLR_ R - Field
L1_ICACHE1_FAIL_INT_CLR
reader - The bit is used to clear interrupt of access fail that occurs in L1-ICache1 due to cpu accesses L1-ICache1. - L1_
ICACH E2_ FAIL_ INT_ CLR_ R - Field
L1_ICACHE2_FAIL_INT_CLR
reader - Reserved - L1_
ICACH E3_ FAIL_ INT_ CLR_ R - Field
L1_ICACHE3_FAIL_INT_CLR
reader - Reserved - R
- Register
L1_CACHE_ACS_FAIL_INT_CLR
reader - W
- Register
L1_CACHE_ACS_FAIL_INT_CLR
writer