Module out_conf0

Configure 0 register of Tx channel 1

Structs

OUT_CONF0_SPEC

Configure 0 register of Tx channel 1

Type Aliases

OUTDSCR_BURST_EN_R

Field OUTDSCR_BURST_EN reader - Set this bit to 1 to enable INCR burst transfer for Tx channel 1 reading link descriptor when accessing internal SRAM.

OUTDSCR_BURST_EN_W

Field OUTDSCR_BURST_EN writer - Set this bit to 1 to enable INCR burst transfer for Tx channel 1 reading link descriptor when accessing internal SRAM.

OUT_AUTO_WRBACK_R

Field OUT_AUTO_WRBACK reader - Set this bit to enable automatic outlink-writeback when all the data in tx buffer has been transmitted.

OUT_AUTO_WRBACK_W

Field OUT_AUTO_WRBACK writer - Set this bit to enable automatic outlink-writeback when all the data in tx buffer has been transmitted.

OUT_DATA_BURST_EN_R

Field OUT_DATA_BURST_EN reader - Set this bit to 1 to enable INCR burst transfer for Tx channel 1 transmitting data when accessing internal SRAM.

OUT_DATA_BURST_EN_W

Field OUT_DATA_BURST_EN writer - Set this bit to 1 to enable INCR burst transfer for Tx channel 1 transmitting data when accessing internal SRAM.

OUT_EOF_MODE_R

Field OUT_EOF_MODE reader - EOF flag generation mode when transmitting data. 1: EOF flag for Tx channel 1 is generated when data need to transmit has been popped from FIFO in DMA

OUT_EOF_MODE_W

Field OUT_EOF_MODE writer - EOF flag generation mode when transmitting data. 1: EOF flag for Tx channel 1 is generated when data need to transmit has been popped from FIFO in DMA

OUT_ETM_EN_R

Field OUT_ETM_EN reader - Set this bit to 1 to enable etm control mode, dma Tx channel 1 is triggered by etm task.

OUT_ETM_EN_W

Field OUT_ETM_EN writer - Set this bit to 1 to enable etm control mode, dma Tx channel 1 is triggered by etm task.

OUT_LOOP_TEST_R

Field OUT_LOOP_TEST reader - reserved

OUT_LOOP_TEST_W

Field OUT_LOOP_TEST writer - reserved

OUT_RST_R

Field OUT_RST reader - This bit is used to reset DMA channel 1 Tx FSM and Tx FIFO pointer.

OUT_RST_W

Field OUT_RST writer - This bit is used to reset DMA channel 1 Tx FSM and Tx FIFO pointer.

R

Register OUT_CONF0 reader

W

Register OUT_CONF0 writer