Expand description
SDIO SLC
Modules§
- slc0_
len_ conf - Length control of transmitting packets
- slc0_
length - Length of transmitting packets
- slc0_
rx_ sharemem_ end - SLC0 AHB RX end address range
- slc0_
rx_ sharemem_ start - SLC0 AHB RX start address range
- slc0_
tx_ sharemem_ end - SLC0 AHB TX end address range
- slc0_
tx_ sharemem_ start - SLC0 AHB TX start address range
- slc0int_
clr - SLC0 to slave interrupt clear
- slc0int_
ena - SLC0 to slave interrupt enable
- slc0int_
raw - SLC0 to slave raw interrupt status
- slc0int_
st - SLC0 to slave masked interrupt status
- slc0rx_
link - SLC0 RX linked list configuration
- slc0rx_
link_ addr - SLC0 RX linked list address
- slc0token1
- SLC0 receiving buffer configuration
- slc0tx_
link - SLC0 TX linked list configuration
- slc0tx_
link_ addr - SLC0 TX linked list address
- slc1_
rx_ sharemem_ end - SLC1 AHB RX end address range
- slc1_
rx_ sharemem_ start - SLC1 AHB RX start address range
- slc1_
tx_ sharemem_ end - SLC1 AHB TX end address range
- slc1_
tx_ sharemem_ start - SLC1 AHB TX start address range
- slc1int_
clr - SLC1 to slave interrupt clear
- slc1int_
ena1 - SLC1 to slave interrupt enable
- slc1int_
raw - SLC1 to slave raw interrupt status
- slc1int_
st1 - SLC1 to slave masked interrupt status
- slc1rx_
link - SLC1 RX linked list configuration
- slc1rx_
link_ addr - SLC1 RX linked list address
- slc1token1
- SLC1 receiving buffer configuration
- slc1tx_
link - SLC1 TX linked list configuration
- slc1tx_
link_ addr - SLC1 TX linked list address
- slc_
burst_ len - DMA AHB burst type configuration
- slc_
rx_ dscr_ conf - DMA slave to host configuration register
- slcconf0
- DMA configuration
- slcconf1
- DMA configuration
- slcintvec_
tohost - Slave to host interrupt vector set
Structs§
- Register
Block - Register block
Type Aliases§
- SLC0INT_
CLR - SLC0INT_CLR (w) register accessor: SLC0 to slave interrupt clear
- SLC0INT_
ENA - SLC0INT_ENA (rw) register accessor: SLC0 to slave interrupt enable
- SLC0INT_
RAW - SLC0INT_RAW (rw) register accessor: SLC0 to slave raw interrupt status
- SLC0INT_
ST - SLC0INT_ST (r) register accessor: SLC0 to slave masked interrupt status
- SLC0RX_
LINK - SLC0RX_LINK (rw) register accessor: SLC0 RX linked list configuration
- SLC0RX_
LINK_ ADDR - SLC0RX_LINK_ADDR (rw) register accessor: SLC0 RX linked list address
- SLC0TOKE
N1 - SLC0TOKEN1 (rw) register accessor: SLC0 receiving buffer configuration
- SLC0TX_
LINK - SLC0TX_LINK (rw) register accessor: SLC0 TX linked list configuration
- SLC0TX_
LINK_ ADDR - SLC0TX_LINK_ADDR (rw) register accessor: SLC0 TX linked list address
- SLC0_
LENGTH - SLC0_LENGTH (r) register accessor: Length of transmitting packets
- SLC0_
LEN_ CONF - SLC0_LEN_CONF (w) register accessor: Length control of transmitting packets
- SLC0_
RX_ SHAREMEM_ END - SLC0_RX_SHAREMEM_END (rw) register accessor: SLC0 AHB RX end address range
- SLC0_
RX_ SHAREMEM_ START - SLC0_RX_SHAREMEM_START (rw) register accessor: SLC0 AHB RX start address range
- SLC0_
TX_ SHAREMEM_ END - SLC0_TX_SHAREMEM_END (rw) register accessor: SLC0 AHB TX end address range
- SLC0_
TX_ SHAREMEM_ START - SLC0_TX_SHAREMEM_START (rw) register accessor: SLC0 AHB TX start address range
- SLC1INT_
CLR - SLC1INT_CLR (w) register accessor: SLC1 to slave interrupt clear
- SLC1INT_
ENA1 - SLC1INT_ENA1 (rw) register accessor: SLC1 to slave interrupt enable
- SLC1INT_
RAW - SLC1INT_RAW (rw) register accessor: SLC1 to slave raw interrupt status
- SLC1INT_
ST1 - SLC1INT_ST1 (r) register accessor: SLC1 to slave masked interrupt status
- SLC1RX_
LINK - SLC1RX_LINK (rw) register accessor: SLC1 RX linked list configuration
- SLC1RX_
LINK_ ADDR - SLC1RX_LINK_ADDR (rw) register accessor: SLC1 RX linked list address
- SLC1TOKE
N1 - SLC1TOKEN1 (rw) register accessor: SLC1 receiving buffer configuration
- SLC1TX_
LINK - SLC1TX_LINK (rw) register accessor: SLC1 TX linked list configuration
- SLC1TX_
LINK_ ADDR - SLC1TX_LINK_ADDR (rw) register accessor: SLC1 TX linked list address
- SLC1_
RX_ SHAREMEM_ END - SLC1_RX_SHAREMEM_END (rw) register accessor: SLC1 AHB RX end address range
- SLC1_
RX_ SHAREMEM_ START - SLC1_RX_SHAREMEM_START (rw) register accessor: SLC1 AHB RX start address range
- SLC1_
TX_ SHAREMEM_ END - SLC1_TX_SHAREMEM_END (rw) register accessor: SLC1 AHB TX end address range
- SLC1_
TX_ SHAREMEM_ START - SLC1_TX_SHAREMEM_START (rw) register accessor: SLC1 AHB TX start address range
- SLCCON
F0 - SLCCONF0 (rw) register accessor: DMA configuration
- SLCCON
F1 - SLCCONF1 (rw) register accessor: DMA configuration
- SLCINTVEC_
TOHOST - SLCINTVEC_TOHOST (w) register accessor: Slave to host interrupt vector set
- SLC_
BURST_ LEN - SLC_BURST_LEN (rw) register accessor: DMA AHB burst type configuration
- SLC_
RX_ DSCR_ CONF - SLC_RX_DSCR_CONF (rw) register accessor: DMA slave to host configuration register