Module esp32c6::pcr::mspi_clk_conf

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Expand description

MSPI_CLK configuration register

Structs

  • MSPI_CLK_CONF_SPEC
    MSPI_CLK configuration register
  • R
    Register MSPI_CLK_CONF reader
  • W
    Register MSPI_CLK_CONF writer

Type Definitions

  • MSPI_FAST_HS_DIV_NUM_R
    Field MSPI_FAST_HS_DIV_NUM reader - Set as one within (3,4,5) to generate div4(default)/div5/div6 of high-speed clock-source to drive clk_mspi_fast. Only avaiable whe the clck-source is a high-speed clock-source such as SPLL.
  • MSPI_FAST_HS_DIV_NUM_W
    Field MSPI_FAST_HS_DIV_NUM writer - Set as one within (3,4,5) to generate div4(default)/div5/div6 of high-speed clock-source to drive clk_mspi_fast. Only avaiable whe the clck-source is a high-speed clock-source such as SPLL.
  • MSPI_FAST_LS_DIV_NUM_R
    Field MSPI_FAST_LS_DIV_NUM reader - Set as one within (0,1,2) to generate div1(default)/div2/div4 of low-speed clock-source to drive clk_mspi_fast. Only avaiable whe the clck-source is a low-speed clock-source such as XTAL/FOSC.
  • MSPI_FAST_LS_DIV_NUM_W
    Field MSPI_FAST_LS_DIV_NUM writer - Set as one within (0,1,2) to generate div1(default)/div2/div4 of low-speed clock-source to drive clk_mspi_fast. Only avaiable whe the clck-source is a low-speed clock-source such as XTAL/FOSC.