esp32c6/spi0/
ecc_err_addr.rs

1#[doc = "Register `ECC_ERR_ADDR` reader"]
2pub type R = crate::R<ECC_ERR_ADDR_SPEC>;
3#[doc = "Field `ECC_ERR_ADDR` reader - This bits show the first MSPI ECC error address. It is cleared by when SPI_MEM_ECC_ERR_INT_CLR bit is set."]
4pub type ECC_ERR_ADDR_R = crate::FieldReader<u32>;
5#[doc = "Field `ECC_ERR_CNT` reader - This bits show the error times of MSPI ECC read. It is cleared by when SPI_MEM_ECC_ERR_INT_CLR bit is set."]
6pub type ECC_ERR_CNT_R = crate::FieldReader;
7impl R {
8    #[doc = "Bits 0:25 - This bits show the first MSPI ECC error address. It is cleared by when SPI_MEM_ECC_ERR_INT_CLR bit is set."]
9    #[inline(always)]
10    pub fn ecc_err_addr(&self) -> ECC_ERR_ADDR_R {
11        ECC_ERR_ADDR_R::new(self.bits & 0x03ff_ffff)
12    }
13    #[doc = "Bits 26:31 - This bits show the error times of MSPI ECC read. It is cleared by when SPI_MEM_ECC_ERR_INT_CLR bit is set."]
14    #[inline(always)]
15    pub fn ecc_err_cnt(&self) -> ECC_ERR_CNT_R {
16        ECC_ERR_CNT_R::new(((self.bits >> 26) & 0x3f) as u8)
17    }
18}
19#[cfg(feature = "impl-register-debug")]
20impl core::fmt::Debug for R {
21    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
22        f.debug_struct("ECC_ERR_ADDR")
23            .field("ecc_err_addr", &self.ecc_err_addr())
24            .field("ecc_err_cnt", &self.ecc_err_cnt())
25            .finish()
26    }
27}
28#[doc = "MSPI ECC error address register\n\nYou can [`read`](crate::Reg::read) this register and get [`ecc_err_addr::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
29pub struct ECC_ERR_ADDR_SPEC;
30impl crate::RegisterSpec for ECC_ERR_ADDR_SPEC {
31    type Ux = u32;
32}
33#[doc = "`read()` method returns [`ecc_err_addr::R`](R) reader structure"]
34impl crate::Readable for ECC_ERR_ADDR_SPEC {}
35#[doc = "`reset()` method sets ECC_ERR_ADDR to value 0"]
36impl crate::Resettable for ECC_ERR_ADDR_SPEC {}
esp32c6/spi0/ecc_err_addr.rs

esp32c6/spi0/
ecc_err_addr.rs
