1#[doc = "Register `LPBUS` reader"]
2pub type R = crate::R<LPBUS_SPEC>;
3#[doc = "Register `LPBUS` writer"]
4pub type W = crate::W<LPBUS_SPEC>;
5#[doc = "Field `FAST_MEM_WPULSE` reader - This field controls fast memory WPULSE parameter."]
6pub type FAST_MEM_WPULSE_R = crate::FieldReader;
7#[doc = "Field `FAST_MEM_WPULSE` writer - This field controls fast memory WPULSE parameter."]
8pub type FAST_MEM_WPULSE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9#[doc = "Field `FAST_MEM_WA` reader - This field controls fast memory WA parameter."]
10pub type FAST_MEM_WA_R = crate::FieldReader;
11#[doc = "Field `FAST_MEM_WA` writer - This field controls fast memory WA parameter."]
12pub type FAST_MEM_WA_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
13#[doc = "Field `FAST_MEM_RA` reader - This field controls fast memory RA parameter."]
14pub type FAST_MEM_RA_R = crate::FieldReader;
15#[doc = "Field `FAST_MEM_RA` writer - This field controls fast memory RA parameter."]
16pub type FAST_MEM_RA_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
17#[doc = "Field `FAST_MEM_MUX_FSM_IDLE` reader - need_des"]
18pub type FAST_MEM_MUX_FSM_IDLE_R = crate::BitReader;
19#[doc = "Field `FAST_MEM_MUX_SEL_STATUS` reader - need_des"]
20pub type FAST_MEM_MUX_SEL_STATUS_R = crate::BitReader;
21#[doc = "Field `FAST_MEM_MUX_SEL_UPDATE` writer - need_des"]
22pub type FAST_MEM_MUX_SEL_UPDATE_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `FAST_MEM_MUX_SEL` reader - need_des"]
24pub type FAST_MEM_MUX_SEL_R = crate::BitReader;
25#[doc = "Field `FAST_MEM_MUX_SEL` writer - need_des"]
26pub type FAST_MEM_MUX_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
27impl R {
28 #[doc = "Bits 16:18 - This field controls fast memory WPULSE parameter."]
29 #[inline(always)]
30 pub fn fast_mem_wpulse(&self) -> FAST_MEM_WPULSE_R {
31 FAST_MEM_WPULSE_R::new(((self.bits >> 16) & 7) as u8)
32 }
33 #[doc = "Bits 19:21 - This field controls fast memory WA parameter."]
34 #[inline(always)]
35 pub fn fast_mem_wa(&self) -> FAST_MEM_WA_R {
36 FAST_MEM_WA_R::new(((self.bits >> 19) & 7) as u8)
37 }
38 #[doc = "Bits 22:23 - This field controls fast memory RA parameter."]
39 #[inline(always)]
40 pub fn fast_mem_ra(&self) -> FAST_MEM_RA_R {
41 FAST_MEM_RA_R::new(((self.bits >> 22) & 3) as u8)
42 }
43 #[doc = "Bit 28 - need_des"]
44 #[inline(always)]
45 pub fn fast_mem_mux_fsm_idle(&self) -> FAST_MEM_MUX_FSM_IDLE_R {
46 FAST_MEM_MUX_FSM_IDLE_R::new(((self.bits >> 28) & 1) != 0)
47 }
48 #[doc = "Bit 29 - need_des"]
49 #[inline(always)]
50 pub fn fast_mem_mux_sel_status(&self) -> FAST_MEM_MUX_SEL_STATUS_R {
51 FAST_MEM_MUX_SEL_STATUS_R::new(((self.bits >> 29) & 1) != 0)
52 }
53 #[doc = "Bit 31 - need_des"]
54 #[inline(always)]
55 pub fn fast_mem_mux_sel(&self) -> FAST_MEM_MUX_SEL_R {
56 FAST_MEM_MUX_SEL_R::new(((self.bits >> 31) & 1) != 0)
57 }
58}
59#[cfg(feature = "impl-register-debug")]
60impl core::fmt::Debug for R {
61 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
62 f.debug_struct("LPBUS")
63 .field("fast_mem_wpulse", &self.fast_mem_wpulse())
64 .field("fast_mem_wa", &self.fast_mem_wa())
65 .field("fast_mem_ra", &self.fast_mem_ra())
66 .field("fast_mem_mux_fsm_idle", &self.fast_mem_mux_fsm_idle())
67 .field("fast_mem_mux_sel_status", &self.fast_mem_mux_sel_status())
68 .field("fast_mem_mux_sel", &self.fast_mem_mux_sel())
69 .finish()
70 }
71}
72impl W {
73 #[doc = "Bits 16:18 - This field controls fast memory WPULSE parameter."]
74 #[inline(always)]
75 pub fn fast_mem_wpulse(&mut self) -> FAST_MEM_WPULSE_W<LPBUS_SPEC> {
76 FAST_MEM_WPULSE_W::new(self, 16)
77 }
78 #[doc = "Bits 19:21 - This field controls fast memory WA parameter."]
79 #[inline(always)]
80 pub fn fast_mem_wa(&mut self) -> FAST_MEM_WA_W<LPBUS_SPEC> {
81 FAST_MEM_WA_W::new(self, 19)
82 }
83 #[doc = "Bits 22:23 - This field controls fast memory RA parameter."]
84 #[inline(always)]
85 pub fn fast_mem_ra(&mut self) -> FAST_MEM_RA_W<LPBUS_SPEC> {
86 FAST_MEM_RA_W::new(self, 22)
87 }
88 #[doc = "Bit 30 - need_des"]
89 #[inline(always)]
90 pub fn fast_mem_mux_sel_update(&mut self) -> FAST_MEM_MUX_SEL_UPDATE_W<LPBUS_SPEC> {
91 FAST_MEM_MUX_SEL_UPDATE_W::new(self, 30)
92 }
93 #[doc = "Bit 31 - need_des"]
94 #[inline(always)]
95 pub fn fast_mem_mux_sel(&mut self) -> FAST_MEM_MUX_SEL_W<LPBUS_SPEC> {
96 FAST_MEM_MUX_SEL_W::new(self, 31)
97 }
98}
99#[doc = "need_des\n\nYou can [`read`](crate::Reg::read) this register and get [`lpbus::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lpbus::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
100pub struct LPBUS_SPEC;
101impl crate::RegisterSpec for LPBUS_SPEC {
102 type Ux = u32;
103}
104#[doc = "`read()` method returns [`lpbus::R`](R) reader structure"]
105impl crate::Readable for LPBUS_SPEC {}
106#[doc = "`write(|w| ..)` method takes [`lpbus::W`](W) writer structure"]
107impl crate::Writable for LPBUS_SPEC {
108 type Safety = crate::Unsafe;
109}
110#[doc = "`reset()` method sets LPBUS to value 0xb020_0000"]
111impl crate::Resettable for LPBUS_SPEC {
112 const RESET_VALUE: u32 = 0xb020_0000;
113}