esp32c6/ieee802154/
dcdc_ctrl.rs

1#[doc = "Register `DCDC_CTRL` reader"]
2pub type R = crate::R<DCDC_CTRL_SPEC>;
3#[doc = "Register `DCDC_CTRL` writer"]
4pub type W = crate::W<DCDC_CTRL_SPEC>;
5#[doc = "Field `DCDC_PRE_UP_DELAY` reader - "]
6pub type DCDC_PRE_UP_DELAY_R = crate::FieldReader;
7#[doc = "Field `DCDC_PRE_UP_DELAY` writer - "]
8pub type DCDC_PRE_UP_DELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `DCDC_DOWN_DELAY` reader - "]
10pub type DCDC_DOWN_DELAY_R = crate::FieldReader;
11#[doc = "Field `DCDC_DOWN_DELAY` writer - "]
12pub type DCDC_DOWN_DELAY_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `EN` reader - "]
14pub type EN_R = crate::BitReader;
15#[doc = "Field `EN` writer - "]
16pub type EN_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `TX_DCDC_UP` reader - "]
18pub type TX_DCDC_UP_R = crate::BitReader;
19#[doc = "Field `TX_DCDC_UP` writer - "]
20pub type TX_DCDC_UP_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bits 0:7"]
23    #[inline(always)]
24    pub fn dcdc_pre_up_delay(&self) -> DCDC_PRE_UP_DELAY_R {
25        DCDC_PRE_UP_DELAY_R::new((self.bits & 0xff) as u8)
26    }
27    #[doc = "Bits 8:15"]
28    #[inline(always)]
29    pub fn dcdc_down_delay(&self) -> DCDC_DOWN_DELAY_R {
30        DCDC_DOWN_DELAY_R::new(((self.bits >> 8) & 0xff) as u8)
31    }
32    #[doc = "Bit 16"]
33    #[inline(always)]
34    pub fn en(&self) -> EN_R {
35        EN_R::new(((self.bits >> 16) & 1) != 0)
36    }
37    #[doc = "Bit 31"]
38    #[inline(always)]
39    pub fn tx_dcdc_up(&self) -> TX_DCDC_UP_R {
40        TX_DCDC_UP_R::new(((self.bits >> 31) & 1) != 0)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("DCDC_CTRL")
47            .field("dcdc_pre_up_delay", &self.dcdc_pre_up_delay())
48            .field("dcdc_down_delay", &self.dcdc_down_delay())
49            .field("en", &self.en())
50            .field("tx_dcdc_up", &self.tx_dcdc_up())
51            .finish()
52    }
53}
54impl W {
55    #[doc = "Bits 0:7"]
56    #[inline(always)]
57    pub fn dcdc_pre_up_delay(&mut self) -> DCDC_PRE_UP_DELAY_W<DCDC_CTRL_SPEC> {
58        DCDC_PRE_UP_DELAY_W::new(self, 0)
59    }
60    #[doc = "Bits 8:15"]
61    #[inline(always)]
62    pub fn dcdc_down_delay(&mut self) -> DCDC_DOWN_DELAY_W<DCDC_CTRL_SPEC> {
63        DCDC_DOWN_DELAY_W::new(self, 8)
64    }
65    #[doc = "Bit 16"]
66    #[inline(always)]
67    pub fn en(&mut self) -> EN_W<DCDC_CTRL_SPEC> {
68        EN_W::new(self, 16)
69    }
70    #[doc = "Bit 31"]
71    #[inline(always)]
72    pub fn tx_dcdc_up(&mut self) -> TX_DCDC_UP_W<DCDC_CTRL_SPEC> {
73        TX_DCDC_UP_W::new(self, 31)
74    }
75}
76#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`dcdc_ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcdc_ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct DCDC_CTRL_SPEC;
78impl crate::RegisterSpec for DCDC_CTRL_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`dcdc_ctrl::R`](R) reader structure"]
82impl crate::Readable for DCDC_CTRL_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`dcdc_ctrl::W`](W) writer structure"]
84impl crate::Writable for DCDC_CTRL_SPEC {
85    type Safety = crate::Unsafe;
86}
87#[doc = "`reset()` method sets DCDC_CTRL to value 0"]
88impl crate::Resettable for DCDC_CTRL_SPEC {}
esp32c6/ieee802154/dcdc_ctrl.rs

esp32c6/ieee802154/
dcdc_ctrl.rs
