esp32c6/gpio_sd/
etm_task_p2_cfg.rs

1#[doc = "Register `ETM_TASK_P2_CFG` reader"]
2pub type R = crate::R<ETM_TASK_P2_CFG_SPEC>;
3#[doc = "Register `ETM_TASK_P2_CFG` writer"]
4pub type W = crate::W<ETM_TASK_P2_CFG_SPEC>;
5#[doc = "Field `GPIO_EN(8-11)` reader - Enable bit of GPIO response etm task."]
6pub type GPIO_EN_R = crate::BitReader;
7#[doc = "Field `GPIO_EN(8-11)` writer - Enable bit of GPIO response etm task."]
8pub type GPIO_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `GPIO_SEL(8-11)` reader - GPIO choose a etm task channel."]
10pub type GPIO_SEL_R = crate::FieldReader;
11#[doc = "Field `GPIO_SEL(8-11)` writer - GPIO choose a etm task channel."]
12pub type GPIO_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
13impl R {
14    #[doc = "Enable bit of GPIO response etm task."]
15    #[doc = ""]
16    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `GPIO8_EN` field.</div>"]
17    #[inline(always)]
18    pub fn gpio_en(&self, n: u8) -> GPIO_EN_R {
19        #[allow(clippy::no_effect)]
20        [(); 4][n as usize];
21        GPIO_EN_R::new(((self.bits >> (n * 8)) & 1) != 0)
22    }
23    #[doc = "Iterator for array of:"]
24    #[doc = "Enable bit of GPIO response etm task."]
25    #[inline(always)]
26    pub fn gpio_en_iter(&self) -> impl Iterator<Item = GPIO_EN_R> + '_ {
27        (0..4).map(move |n| GPIO_EN_R::new(((self.bits >> (n * 8)) & 1) != 0))
28    }
29    #[doc = "Bit 0 - Enable bit of GPIO response etm task."]
30    #[inline(always)]
31    pub fn gpio8_en(&self) -> GPIO_EN_R {
32        GPIO_EN_R::new((self.bits & 1) != 0)
33    }
34    #[doc = "Bit 8 - Enable bit of GPIO response etm task."]
35    #[inline(always)]
36    pub fn gpio9_en(&self) -> GPIO_EN_R {
37        GPIO_EN_R::new(((self.bits >> 8) & 1) != 0)
38    }
39    #[doc = "Bit 16 - Enable bit of GPIO response etm task."]
40    #[inline(always)]
41    pub fn gpio10_en(&self) -> GPIO_EN_R {
42        GPIO_EN_R::new(((self.bits >> 16) & 1) != 0)
43    }
44    #[doc = "Bit 24 - Enable bit of GPIO response etm task."]
45    #[inline(always)]
46    pub fn gpio11_en(&self) -> GPIO_EN_R {
47        GPIO_EN_R::new(((self.bits >> 24) & 1) != 0)
48    }
49    #[doc = "GPIO choose a etm task channel."]
50    #[doc = ""]
51    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `GPIO8_SEL` field.</div>"]
52    #[inline(always)]
53    pub fn gpio_sel(&self, n: u8) -> GPIO_SEL_R {
54        #[allow(clippy::no_effect)]
55        [(); 4][n as usize];
56        GPIO_SEL_R::new(((self.bits >> (n * 8 + 1)) & 7) as u8)
57    }
58    #[doc = "Iterator for array of:"]
59    #[doc = "GPIO choose a etm task channel."]
60    #[inline(always)]
61    pub fn gpio_sel_iter(&self) -> impl Iterator<Item = GPIO_SEL_R> + '_ {
62        (0..4).map(move |n| GPIO_SEL_R::new(((self.bits >> (n * 8 + 1)) & 7) as u8))
63    }
64    #[doc = "Bits 1:3 - GPIO choose a etm task channel."]
65    #[inline(always)]
66    pub fn gpio8_sel(&self) -> GPIO_SEL_R {
67        GPIO_SEL_R::new(((self.bits >> 1) & 7) as u8)
68    }
69    #[doc = "Bits 9:11 - GPIO choose a etm task channel."]
70    #[inline(always)]
71    pub fn gpio9_sel(&self) -> GPIO_SEL_R {
72        GPIO_SEL_R::new(((self.bits >> 9) & 7) as u8)
73    }
74    #[doc = "Bits 17:19 - GPIO choose a etm task channel."]
75    #[inline(always)]
76    pub fn gpio10_sel(&self) -> GPIO_SEL_R {
77        GPIO_SEL_R::new(((self.bits >> 17) & 7) as u8)
78    }
79    #[doc = "Bits 25:27 - GPIO choose a etm task channel."]
80    #[inline(always)]
81    pub fn gpio11_sel(&self) -> GPIO_SEL_R {
82        GPIO_SEL_R::new(((self.bits >> 25) & 7) as u8)
83    }
84}
85#[cfg(feature = "impl-register-debug")]
86impl core::fmt::Debug for R {
87    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
88        f.debug_struct("ETM_TASK_P2_CFG")
89            .field("gpio8_en", &self.gpio8_en())
90            .field("gpio9_en", &self.gpio9_en())
91            .field("gpio10_en", &self.gpio10_en())
92            .field("gpio11_en", &self.gpio11_en())
93            .field("gpio8_sel", &self.gpio8_sel())
94            .field("gpio9_sel", &self.gpio9_sel())
95            .field("gpio10_sel", &self.gpio10_sel())
96            .field("gpio11_sel", &self.gpio11_sel())
97            .finish()
98    }
99}
100impl W {
101    #[doc = "Enable bit of GPIO response etm task."]
102    #[doc = ""]
103    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `GPIO8_EN` field.</div>"]
104    #[inline(always)]
105    pub fn gpio_en(&mut self, n: u8) -> GPIO_EN_W<ETM_TASK_P2_CFG_SPEC> {
106        #[allow(clippy::no_effect)]
107        [(); 4][n as usize];
108        GPIO_EN_W::new(self, n * 8)
109    }
110    #[doc = "Bit 0 - Enable bit of GPIO response etm task."]
111    #[inline(always)]
112    pub fn gpio8_en(&mut self) -> GPIO_EN_W<ETM_TASK_P2_CFG_SPEC> {
113        GPIO_EN_W::new(self, 0)
114    }
115    #[doc = "Bit 8 - Enable bit of GPIO response etm task."]
116    #[inline(always)]
117    pub fn gpio9_en(&mut self) -> GPIO_EN_W<ETM_TASK_P2_CFG_SPEC> {
118        GPIO_EN_W::new(self, 8)
119    }
120    #[doc = "Bit 16 - Enable bit of GPIO response etm task."]
121    #[inline(always)]
122    pub fn gpio10_en(&mut self) -> GPIO_EN_W<ETM_TASK_P2_CFG_SPEC> {
123        GPIO_EN_W::new(self, 16)
124    }
125    #[doc = "Bit 24 - Enable bit of GPIO response etm task."]
126    #[inline(always)]
127    pub fn gpio11_en(&mut self) -> GPIO_EN_W<ETM_TASK_P2_CFG_SPEC> {
128        GPIO_EN_W::new(self, 24)
129    }
130    #[doc = "GPIO choose a etm task channel."]
131    #[doc = ""]
132    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `GPIO8_SEL` field.</div>"]
133    #[inline(always)]
134    pub fn gpio_sel(&mut self, n: u8) -> GPIO_SEL_W<ETM_TASK_P2_CFG_SPEC> {
135        #[allow(clippy::no_effect)]
136        [(); 4][n as usize];
137        GPIO_SEL_W::new(self, n * 8 + 1)
138    }
139    #[doc = "Bits 1:3 - GPIO choose a etm task channel."]
140    #[inline(always)]
141    pub fn gpio8_sel(&mut self) -> GPIO_SEL_W<ETM_TASK_P2_CFG_SPEC> {
142        GPIO_SEL_W::new(self, 1)
143    }
144    #[doc = "Bits 9:11 - GPIO choose a etm task channel."]
145    #[inline(always)]
146    pub fn gpio9_sel(&mut self) -> GPIO_SEL_W<ETM_TASK_P2_CFG_SPEC> {
147        GPIO_SEL_W::new(self, 9)
148    }
149    #[doc = "Bits 17:19 - GPIO choose a etm task channel."]
150    #[inline(always)]
151    pub fn gpio10_sel(&mut self) -> GPIO_SEL_W<ETM_TASK_P2_CFG_SPEC> {
152        GPIO_SEL_W::new(self, 17)
153    }
154    #[doc = "Bits 25:27 - GPIO choose a etm task channel."]
155    #[inline(always)]
156    pub fn gpio11_sel(&mut self) -> GPIO_SEL_W<ETM_TASK_P2_CFG_SPEC> {
157        GPIO_SEL_W::new(self, 25)
158    }
159}
160#[doc = "Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::Reg::read) this register and get [`etm_task_p2_cfg::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`etm_task_p2_cfg::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
161pub struct ETM_TASK_P2_CFG_SPEC;
162impl crate::RegisterSpec for ETM_TASK_P2_CFG_SPEC {
163    type Ux = u32;
164}
165#[doc = "`read()` method returns [`etm_task_p2_cfg::R`](R) reader structure"]
166impl crate::Readable for ETM_TASK_P2_CFG_SPEC {}
167#[doc = "`write(|w| ..)` method takes [`etm_task_p2_cfg::W`](W) writer structure"]
168impl crate::Writable for ETM_TASK_P2_CFG_SPEC {
169    type Safety = crate::Unsafe;
170}
171#[doc = "`reset()` method sets ETM_TASK_P2_CFG to value 0"]
172impl crate::Resettable for ETM_TASK_P2_CFG_SPEC {}
esp32c6/gpio_sd/etm_task_p2_cfg.rs

esp32c6/gpio_sd/
etm_task_p2_cfg.rs
