esp32c6/ds/
set_finish.rs

1#[doc = "Register `SET_FINISH` writer"]
2pub type W = crate::W<SET_FINISH_SPEC>;
3#[doc = "Field `SET_FINISH` writer - Set this bit to finish DS process."]
4pub type SET_FINISH_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[cfg(feature = "impl-register-debug")]
6impl core::fmt::Debug for crate::generic::Reg<SET_FINISH_SPEC> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bit 0 - Set this bit to finish DS process."]
13    #[inline(always)]
14    pub fn set_finish(&mut self) -> SET_FINISH_W<SET_FINISH_SPEC> {
15        SET_FINISH_W::new(self, 0)
16    }
17}
18#[doc = "DS finish control register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`set_finish::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct SET_FINISH_SPEC;
20impl crate::RegisterSpec for SET_FINISH_SPEC {
21    type Ux = u32;
22}
23#[doc = "`write(|w| ..)` method takes [`set_finish::W`](W) writer structure"]
24impl crate::Writable for SET_FINISH_SPEC {
25    type Safety = crate::Unsafe;
26}
27#[doc = "`reset()` method sets SET_FINISH to value 0"]
28impl crate::Resettable for SET_FINISH_SPEC {}
esp32c6/ds/set_finish.rs

esp32c6/ds/
set_finish.rs
