esp32c6/twai0/
bus_timing_0.rs

1#[doc = "Register `BUS_TIMING_0` reader"]
2pub type R = crate::R<BUS_TIMING_0_SPEC>;
3#[doc = "Register `BUS_TIMING_0` writer"]
4pub type W = crate::W<BUS_TIMING_0_SPEC>;
5#[doc = "Field `BAUD_PRESC` reader - The period of the TWAI system clock is programmable and determines the individual bit timing. Software has R/W permission in reset mode and RO permission in operation mode."]
6pub type BAUD_PRESC_R = crate::FieldReader<u16>;
7#[doc = "Field `BAUD_PRESC` writer - The period of the TWAI system clock is programmable and determines the individual bit timing. Software has R/W permission in reset mode and RO permission in operation mode."]
8pub type BAUD_PRESC_W<'a, REG> = crate::FieldWriter<'a, REG, 14, u16>;
9#[doc = "Field `SYNC_JUMP_WIDTH` reader - The synchronization jump width defines the maximum number of clock cycles a bit period may be shortened or lengthened. Software has R/W permission in reset mode and RO in operation mode."]
10pub type SYNC_JUMP_WIDTH_R = crate::FieldReader;
11#[doc = "Field `SYNC_JUMP_WIDTH` writer - The synchronization jump width defines the maximum number of clock cycles a bit period may be shortened or lengthened. Software has R/W permission in reset mode and RO in operation mode."]
12pub type SYNC_JUMP_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13impl R {
14    #[doc = "Bits 0:13 - The period of the TWAI system clock is programmable and determines the individual bit timing. Software has R/W permission in reset mode and RO permission in operation mode."]
15    #[inline(always)]
16    pub fn baud_presc(&self) -> BAUD_PRESC_R {
17        BAUD_PRESC_R::new((self.bits & 0x3fff) as u16)
18    }
19    #[doc = "Bits 14:15 - The synchronization jump width defines the maximum number of clock cycles a bit period may be shortened or lengthened. Software has R/W permission in reset mode and RO in operation mode."]
20    #[inline(always)]
21    pub fn sync_jump_width(&self) -> SYNC_JUMP_WIDTH_R {
22        SYNC_JUMP_WIDTH_R::new(((self.bits >> 14) & 3) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("BUS_TIMING_0")
29            .field("baud_presc", &self.baud_presc())
30            .field("sync_jump_width", &self.sync_jump_width())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bits 0:13 - The period of the TWAI system clock is programmable and determines the individual bit timing. Software has R/W permission in reset mode and RO permission in operation mode."]
36    #[inline(always)]
37    pub fn baud_presc(&mut self) -> BAUD_PRESC_W<BUS_TIMING_0_SPEC> {
38        BAUD_PRESC_W::new(self, 0)
39    }
40    #[doc = "Bits 14:15 - The synchronization jump width defines the maximum number of clock cycles a bit period may be shortened or lengthened. Software has R/W permission in reset mode and RO in operation mode."]
41    #[inline(always)]
42    pub fn sync_jump_width(&mut self) -> SYNC_JUMP_WIDTH_W<BUS_TIMING_0_SPEC> {
43        SYNC_JUMP_WIDTH_W::new(self, 14)
44    }
45}
46#[doc = "Bit timing configuration register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`bus_timing_0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bus_timing_0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
47pub struct BUS_TIMING_0_SPEC;
48impl crate::RegisterSpec for BUS_TIMING_0_SPEC {
49    type Ux = u32;
50}
51#[doc = "`read()` method returns [`bus_timing_0::R`](R) reader structure"]
52impl crate::Readable for BUS_TIMING_0_SPEC {}
53#[doc = "`write(|w| ..)` method takes [`bus_timing_0::W`](W) writer structure"]
54impl crate::Writable for BUS_TIMING_0_SPEC {
55    type Safety = crate::Unsafe;
56}
57#[doc = "`reset()` method sets BUS_TIMING_0 to value 0"]
58impl crate::Resettable for BUS_TIMING_0_SPEC {}
esp32c6/twai0/bus_timing_0.rs

esp32c6/twai0/
bus_timing_0.rs
