esp32c6/lp_timer/
update.rs

1#[doc = "Register `UPDATE` reader"]
2pub type R = crate::R<UPDATE_SPEC>;
3#[doc = "Register `UPDATE` writer"]
4pub type W = crate::W<UPDATE_SPEC>;
5#[doc = "Field `MAIN_TIMER_UPDATE` writer - need_des"]
6pub type MAIN_TIMER_UPDATE_W<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `MAIN_TIMER_XTAL_OFF` reader - need_des"]
8pub type MAIN_TIMER_XTAL_OFF_R = crate::BitReader;
9#[doc = "Field `MAIN_TIMER_XTAL_OFF` writer - need_des"]
10pub type MAIN_TIMER_XTAL_OFF_W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `MAIN_TIMER_SYS_STALL` reader - need_des"]
12pub type MAIN_TIMER_SYS_STALL_R = crate::BitReader;
13#[doc = "Field `MAIN_TIMER_SYS_STALL` writer - need_des"]
14pub type MAIN_TIMER_SYS_STALL_W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `MAIN_TIMER_SYS_RST` reader - need_des"]
16pub type MAIN_TIMER_SYS_RST_R = crate::BitReader;
17#[doc = "Field `MAIN_TIMER_SYS_RST` writer - need_des"]
18pub type MAIN_TIMER_SYS_RST_W<'a, REG> = crate::BitWriter<'a, REG>;
19impl R {
20    #[doc = "Bit 29 - need_des"]
21    #[inline(always)]
22    pub fn main_timer_xtal_off(&self) -> MAIN_TIMER_XTAL_OFF_R {
23        MAIN_TIMER_XTAL_OFF_R::new(((self.bits >> 29) & 1) != 0)
24    }
25    #[doc = "Bit 30 - need_des"]
26    #[inline(always)]
27    pub fn main_timer_sys_stall(&self) -> MAIN_TIMER_SYS_STALL_R {
28        MAIN_TIMER_SYS_STALL_R::new(((self.bits >> 30) & 1) != 0)
29    }
30    #[doc = "Bit 31 - need_des"]
31    #[inline(always)]
32    pub fn main_timer_sys_rst(&self) -> MAIN_TIMER_SYS_RST_R {
33        MAIN_TIMER_SYS_RST_R::new(((self.bits >> 31) & 1) != 0)
34    }
35}
36#[cfg(feature = "impl-register-debug")]
37impl core::fmt::Debug for R {
38    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
39        f.debug_struct("UPDATE")
40            .field("main_timer_xtal_off", &self.main_timer_xtal_off())
41            .field("main_timer_sys_stall", &self.main_timer_sys_stall())
42            .field("main_timer_sys_rst", &self.main_timer_sys_rst())
43            .finish()
44    }
45}
46impl W {
47    #[doc = "Bit 28 - need_des"]
48    #[inline(always)]
49    pub fn main_timer_update(&mut self) -> MAIN_TIMER_UPDATE_W<UPDATE_SPEC> {
50        MAIN_TIMER_UPDATE_W::new(self, 28)
51    }
52    #[doc = "Bit 29 - need_des"]
53    #[inline(always)]
54    pub fn main_timer_xtal_off(&mut self) -> MAIN_TIMER_XTAL_OFF_W<UPDATE_SPEC> {
55        MAIN_TIMER_XTAL_OFF_W::new(self, 29)
56    }
57    #[doc = "Bit 30 - need_des"]
58    #[inline(always)]
59    pub fn main_timer_sys_stall(&mut self) -> MAIN_TIMER_SYS_STALL_W<UPDATE_SPEC> {
60        MAIN_TIMER_SYS_STALL_W::new(self, 30)
61    }
62    #[doc = "Bit 31 - need_des"]
63    #[inline(always)]
64    pub fn main_timer_sys_rst(&mut self) -> MAIN_TIMER_SYS_RST_W<UPDATE_SPEC> {
65        MAIN_TIMER_SYS_RST_W::new(self, 31)
66    }
67}
68#[doc = "need_des\n\nYou can [`read`](crate::Reg::read) this register and get [`update::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`update::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
69pub struct UPDATE_SPEC;
70impl crate::RegisterSpec for UPDATE_SPEC {
71    type Ux = u32;
72}
73#[doc = "`read()` method returns [`update::R`](R) reader structure"]
74impl crate::Readable for UPDATE_SPEC {}
75#[doc = "`write(|w| ..)` method takes [`update::W`](W) writer structure"]
76impl crate::Writable for UPDATE_SPEC {
77    type Safety = crate::Unsafe;
78    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
79    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
80}
81#[doc = "`reset()` method sets UPDATE to value 0"]
82impl crate::Resettable for UPDATE_SPEC {
83    const RESET_VALUE: u32 = 0;
84}