esp32c6/lp_apm0/
int_en.rs

1#[doc = "Register `INT_EN` reader"]
2pub type R = crate::R<INT_EN_SPEC>;
3#[doc = "Register `INT_EN` writer"]
4pub type W = crate::W<INT_EN_SPEC>;
5#[doc = "Field `M_APM(0-0)` reader - APM M%s interrupt enable"]
6pub type M_APM_R = crate::BitReader;
7#[doc = "Field `M_APM(0-0)` writer - APM M%s interrupt enable"]
8pub type M_APM_W<'a, REG> = crate::BitWriter<'a, REG>;
9impl R {
10    #[doc = "APM M(0-0) interrupt enable"]
11    #[doc = ""]
12    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `M0_APM` field.</div>"]
13    #[inline(always)]
14    pub fn m_apm(&self, n: u8) -> M_APM_R {
15        #[allow(clippy::no_effect)]
16        [(); 1][n as usize];
17        M_APM_R::new(((self.bits >> (n * 0)) & 1) != 0)
18    }
19    #[doc = "Iterator for array of:"]
20    #[doc = "APM M(0-0) interrupt enable"]
21    #[inline(always)]
22    pub fn m_apm_iter(&self) -> impl Iterator<Item = M_APM_R> + '_ {
23        (0..1).map(move |n| M_APM_R::new(((self.bits >> (n * 0)) & 1) != 0))
24    }
25    #[doc = "Bit 0 - APM M0 interrupt enable"]
26    #[inline(always)]
27    pub fn m0_apm(&self) -> M_APM_R {
28        M_APM_R::new((self.bits & 1) != 0)
29    }
30}
31#[cfg(feature = "impl-register-debug")]
32impl core::fmt::Debug for R {
33    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
34        f.debug_struct("INT_EN")
35            .field("m0_apm", &self.m0_apm())
36            .finish()
37    }
38}
39impl W {
40    #[doc = "APM M(0-0) interrupt enable"]
41    #[doc = ""]
42    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `M0_APM` field.</div>"]
43    #[inline(always)]
44    pub fn m_apm(&mut self, n: u8) -> M_APM_W<INT_EN_SPEC> {
45        #[allow(clippy::no_effect)]
46        [(); 1][n as usize];
47        M_APM_W::new(self, n * 0)
48    }
49    #[doc = "Bit 0 - APM M0 interrupt enable"]
50    #[inline(always)]
51    pub fn m0_apm(&mut self) -> M_APM_W<INT_EN_SPEC> {
52        M_APM_W::new(self, 0)
53    }
54}
55#[doc = "APM interrupt enable register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
56pub struct INT_EN_SPEC;
57impl crate::RegisterSpec for INT_EN_SPEC {
58    type Ux = u32;
59}
60#[doc = "`read()` method returns [`int_en::R`](R) reader structure"]
61impl crate::Readable for INT_EN_SPEC {}
62#[doc = "`write(|w| ..)` method takes [`int_en::W`](W) writer structure"]
63impl crate::Writable for INT_EN_SPEC {
64    type Safety = crate::Unsafe;
65    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
66    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
67}
68#[doc = "`reset()` method sets INT_EN to value 0"]
69impl crate::Resettable for INT_EN_SPEC {
70    const RESET_VALUE: u32 = 0;
71}
esp32c6/lp_apm0/int_en.rs

esp32c6/lp_apm0/
int_en.rs
