esp32c6/hinf/
cfg_uhs1_int_mode.rs

1#[doc = "Register `CFG_UHS1_INT_MODE` reader"]
2pub type R = crate::R<CFG_UHS1_INT_MODE_SPEC>;
3#[doc = "Register `CFG_UHS1_INT_MODE` writer"]
4pub type W = crate::W<CFG_UHS1_INT_MODE_SPEC>;
5#[doc = "Field `INTOE_END_AHEAD_MODE` reader - intoe on dat1 end ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
6pub type INTOE_END_AHEAD_MODE_R = crate::FieldReader;
7#[doc = "Field `INTOE_END_AHEAD_MODE` writer - intoe on dat1 end ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
8pub type INTOE_END_AHEAD_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `INT_END_AHEAD_MODE` reader - int on dat1 end ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
10pub type INT_END_AHEAD_MODE_R = crate::FieldReader;
11#[doc = "Field `INT_END_AHEAD_MODE` writer - int on dat1 end ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
12pub type INT_END_AHEAD_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `INTOE_ST_AHEAD_MODE` reader - intoe on dat1 start ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
14pub type INTOE_ST_AHEAD_MODE_R = crate::FieldReader;
15#[doc = "Field `INTOE_ST_AHEAD_MODE` writer - intoe on dat1 start ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
16pub type INTOE_ST_AHEAD_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
17#[doc = "Field `INT_ST_AHEAD_MODE` reader - int on dat1 start ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
18pub type INT_ST_AHEAD_MODE_R = crate::FieldReader;
19#[doc = "Field `INT_ST_AHEAD_MODE` writer - int on dat1 start ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
20pub type INT_ST_AHEAD_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
21impl R {
22    #[doc = "Bits 0:1 - intoe on dat1 end ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
23    #[inline(always)]
24    pub fn intoe_end_ahead_mode(&self) -> INTOE_END_AHEAD_MODE_R {
25        INTOE_END_AHEAD_MODE_R::new((self.bits & 3) as u8)
26    }
27    #[doc = "Bits 2:3 - int on dat1 end ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
28    #[inline(always)]
29    pub fn int_end_ahead_mode(&self) -> INT_END_AHEAD_MODE_R {
30        INT_END_AHEAD_MODE_R::new(((self.bits >> 2) & 3) as u8)
31    }
32    #[doc = "Bits 4:5 - intoe on dat1 start ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
33    #[inline(always)]
34    pub fn intoe_st_ahead_mode(&self) -> INTOE_ST_AHEAD_MODE_R {
35        INTOE_ST_AHEAD_MODE_R::new(((self.bits >> 4) & 3) as u8)
36    }
37    #[doc = "Bits 6:7 - int on dat1 start ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
38    #[inline(always)]
39    pub fn int_st_ahead_mode(&self) -> INT_ST_AHEAD_MODE_R {
40        INT_ST_AHEAD_MODE_R::new(((self.bits >> 6) & 3) as u8)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("CFG_UHS1_INT_MODE")
47            .field("intoe_end_ahead_mode", &self.intoe_end_ahead_mode())
48            .field("int_end_ahead_mode", &self.int_end_ahead_mode())
49            .field("intoe_st_ahead_mode", &self.intoe_st_ahead_mode())
50            .field("int_st_ahead_mode", &self.int_st_ahead_mode())
51            .finish()
52    }
53}
54impl W {
55    #[doc = "Bits 0:1 - intoe on dat1 end ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
56    #[inline(always)]
57    pub fn intoe_end_ahead_mode(&mut self) -> INTOE_END_AHEAD_MODE_W<CFG_UHS1_INT_MODE_SPEC> {
58        INTOE_END_AHEAD_MODE_W::new(self, 0)
59    }
60    #[doc = "Bits 2:3 - int on dat1 end ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
61    #[inline(always)]
62    pub fn int_end_ahead_mode(&mut self) -> INT_END_AHEAD_MODE_W<CFG_UHS1_INT_MODE_SPEC> {
63        INT_END_AHEAD_MODE_W::new(self, 2)
64    }
65    #[doc = "Bits 4:5 - intoe on dat1 start ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
66    #[inline(always)]
67    pub fn intoe_st_ahead_mode(&mut self) -> INTOE_ST_AHEAD_MODE_W<CFG_UHS1_INT_MODE_SPEC> {
68        INTOE_ST_AHEAD_MODE_W::new(self, 4)
69    }
70    #[doc = "Bits 6:7 - int on dat1 start ahead of time: 0/3-no, 1-ahead 1sdclk, 2-ahead 2sdclk"]
71    #[inline(always)]
72    pub fn int_st_ahead_mode(&mut self) -> INT_ST_AHEAD_MODE_W<CFG_UHS1_INT_MODE_SPEC> {
73        INT_ST_AHEAD_MODE_W::new(self, 6)
74    }
75}
76#[doc = "configure int to start and end ahead of time in uhs1 mode\n\nYou can [`read`](crate::Reg::read) this register and get [`cfg_uhs1_int_mode::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cfg_uhs1_int_mode::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct CFG_UHS1_INT_MODE_SPEC;
78impl crate::RegisterSpec for CFG_UHS1_INT_MODE_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`cfg_uhs1_int_mode::R`](R) reader structure"]
82impl crate::Readable for CFG_UHS1_INT_MODE_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`cfg_uhs1_int_mode::W`](W) writer structure"]
84impl crate::Writable for CFG_UHS1_INT_MODE_SPEC {
85    type Safety = crate::Unsafe;
86    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
87    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
88}
89#[doc = "`reset()` method sets CFG_UHS1_INT_MODE to value 0"]
90impl crate::Resettable for CFG_UHS1_INT_MODE_SPEC {
91    const RESET_VALUE: u32 = 0;
92}
esp32c6/hinf/cfg_uhs1_int_mode.rs

esp32c6/hinf/
cfg_uhs1_int_mode.rs
