esp32c6/extmem/
l2_cache_prelock_sct_size.rs

1#[doc = "Register `L2_CACHE_PRELOCK_SCT_SIZE` reader"]
2pub type R = crate::R<L2_CACHE_PRELOCK_SCT_SIZE_SPEC>;
3#[doc = "Field `L2_CACHE_PRELOCK_SCT0_SIZE` reader - Those bits are used to configure the size of the first section of prelock on L2-Cache, which should be used together with L2_CACHE_PRELOCK_SCT0_ADDR_REG"]
4pub type L2_CACHE_PRELOCK_SCT0_SIZE_R = crate::FieldReader<u16>;
5#[doc = "Field `L2_CACHE_PRELOCK_SCT1_SIZE` reader - Those bits are used to configure the size of the second section of prelock on L2-Cache, which should be used together with L2_CACHE_PRELOCK_SCT1_ADDR_REG"]
6pub type L2_CACHE_PRELOCK_SCT1_SIZE_R = crate::FieldReader<u16>;
7impl R {
8    #[doc = "Bits 0:15 - Those bits are used to configure the size of the first section of prelock on L2-Cache, which should be used together with L2_CACHE_PRELOCK_SCT0_ADDR_REG"]
9    #[inline(always)]
10    pub fn l2_cache_prelock_sct0_size(&self) -> L2_CACHE_PRELOCK_SCT0_SIZE_R {
11        L2_CACHE_PRELOCK_SCT0_SIZE_R::new((self.bits & 0xffff) as u16)
12    }
13    #[doc = "Bits 16:31 - Those bits are used to configure the size of the second section of prelock on L2-Cache, which should be used together with L2_CACHE_PRELOCK_SCT1_ADDR_REG"]
14    #[inline(always)]
15    pub fn l2_cache_prelock_sct1_size(&self) -> L2_CACHE_PRELOCK_SCT1_SIZE_R {
16        L2_CACHE_PRELOCK_SCT1_SIZE_R::new(((self.bits >> 16) & 0xffff) as u16)
17    }
18}
19#[cfg(feature = "impl-register-debug")]
20impl core::fmt::Debug for R {
21    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
22        f.debug_struct("L2_CACHE_PRELOCK_SCT_SIZE")
23            .field(
24                "l2_cache_prelock_sct0_size",
25                &self.l2_cache_prelock_sct0_size(),
26            )
27            .field(
28                "l2_cache_prelock_sct1_size",
29                &self.l2_cache_prelock_sct1_size(),
30            )
31            .finish()
32    }
33}
34#[doc = "L2 Cache prelock section size configure register\n\nYou can [`read`](crate::Reg::read) this register and get [`l2_cache_prelock_sct_size::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
35pub struct L2_CACHE_PRELOCK_SCT_SIZE_SPEC;
36impl crate::RegisterSpec for L2_CACHE_PRELOCK_SCT_SIZE_SPEC {
37    type Ux = u32;
38}
39#[doc = "`read()` method returns [`l2_cache_prelock_sct_size::R`](R) reader structure"]
40impl crate::Readable for L2_CACHE_PRELOCK_SCT_SIZE_SPEC {}
41#[doc = "`reset()` method sets L2_CACHE_PRELOCK_SCT_SIZE to value 0xffff_ffff"]
42impl crate::Resettable for L2_CACHE_PRELOCK_SCT_SIZE_SPEC {
43    const RESET_VALUE: u32 = 0xffff_ffff;
44}
esp32c6/extmem/l2_cache_prelock_sct_size.rs

esp32c6/extmem/
l2_cache_prelock_sct_size.rs
