esp32c6/extmem/
l1_cache_prelock_conf.rs

1#[doc = "Register `L1_CACHE_PRELOCK_CONF` reader"]
2pub type R = crate::R<L1_CACHE_PRELOCK_CONF_SPEC>;
3#[doc = "Register `L1_CACHE_PRELOCK_CONF` writer"]
4pub type W = crate::W<L1_CACHE_PRELOCK_CONF_SPEC>;
5#[doc = "Field `L1_CACHE_PRELOCK_SCT0_EN` reader - The bit is used to enable the first section of prelock function on L1-Cache."]
6pub type L1_CACHE_PRELOCK_SCT0_EN_R = crate::BitReader;
7#[doc = "Field `L1_CACHE_PRELOCK_SCT0_EN` writer - The bit is used to enable the first section of prelock function on L1-Cache."]
8pub type L1_CACHE_PRELOCK_SCT0_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `L1_CACHE_PRELOCK_SCT1_EN` reader - The bit is used to enable the second section of prelock function on L1-Cache."]
10pub type L1_CACHE_PRELOCK_SCT1_EN_R = crate::BitReader;
11#[doc = "Field `L1_CACHE_PRELOCK_SCT1_EN` writer - The bit is used to enable the second section of prelock function on L1-Cache."]
12pub type L1_CACHE_PRELOCK_SCT1_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `L1_CACHE_PRELOCK_RGID` reader - The bit is used to set the gid of l1 cache prelock."]
14pub type L1_CACHE_PRELOCK_RGID_R = crate::FieldReader;
15impl R {
16    #[doc = "Bit 0 - The bit is used to enable the first section of prelock function on L1-Cache."]
17    #[inline(always)]
18    pub fn l1_cache_prelock_sct0_en(&self) -> L1_CACHE_PRELOCK_SCT0_EN_R {
19        L1_CACHE_PRELOCK_SCT0_EN_R::new((self.bits & 1) != 0)
20    }
21    #[doc = "Bit 1 - The bit is used to enable the second section of prelock function on L1-Cache."]
22    #[inline(always)]
23    pub fn l1_cache_prelock_sct1_en(&self) -> L1_CACHE_PRELOCK_SCT1_EN_R {
24        L1_CACHE_PRELOCK_SCT1_EN_R::new(((self.bits >> 1) & 1) != 0)
25    }
26    #[doc = "Bits 2:5 - The bit is used to set the gid of l1 cache prelock."]
27    #[inline(always)]
28    pub fn l1_cache_prelock_rgid(&self) -> L1_CACHE_PRELOCK_RGID_R {
29        L1_CACHE_PRELOCK_RGID_R::new(((self.bits >> 2) & 0x0f) as u8)
30    }
31}
32#[cfg(feature = "impl-register-debug")]
33impl core::fmt::Debug for R {
34    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
35        f.debug_struct("L1_CACHE_PRELOCK_CONF")
36            .field("l1_cache_prelock_sct0_en", &self.l1_cache_prelock_sct0_en())
37            .field("l1_cache_prelock_sct1_en", &self.l1_cache_prelock_sct1_en())
38            .field("l1_cache_prelock_rgid", &self.l1_cache_prelock_rgid())
39            .finish()
40    }
41}
42impl W {
43    #[doc = "Bit 0 - The bit is used to enable the first section of prelock function on L1-Cache."]
44    #[inline(always)]
45    pub fn l1_cache_prelock_sct0_en(
46        &mut self,
47    ) -> L1_CACHE_PRELOCK_SCT0_EN_W<L1_CACHE_PRELOCK_CONF_SPEC> {
48        L1_CACHE_PRELOCK_SCT0_EN_W::new(self, 0)
49    }
50    #[doc = "Bit 1 - The bit is used to enable the second section of prelock function on L1-Cache."]
51    #[inline(always)]
52    pub fn l1_cache_prelock_sct1_en(
53        &mut self,
54    ) -> L1_CACHE_PRELOCK_SCT1_EN_W<L1_CACHE_PRELOCK_CONF_SPEC> {
55        L1_CACHE_PRELOCK_SCT1_EN_W::new(self, 1)
56    }
57}
58#[doc = "L1 Cache prelock configure register\n\nYou can [`read`](crate::Reg::read) this register and get [`l1_cache_prelock_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`l1_cache_prelock_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
59pub struct L1_CACHE_PRELOCK_CONF_SPEC;
60impl crate::RegisterSpec for L1_CACHE_PRELOCK_CONF_SPEC {
61    type Ux = u32;
62}
63#[doc = "`read()` method returns [`l1_cache_prelock_conf::R`](R) reader structure"]
64impl crate::Readable for L1_CACHE_PRELOCK_CONF_SPEC {}
65#[doc = "`write(|w| ..)` method takes [`l1_cache_prelock_conf::W`](W) writer structure"]
66impl crate::Writable for L1_CACHE_PRELOCK_CONF_SPEC {
67    type Safety = crate::Unsafe;
68    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
69    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
70}
71#[doc = "`reset()` method sets L1_CACHE_PRELOCK_CONF to value 0"]
72impl crate::Resettable for L1_CACHE_PRELOCK_CONF_SPEC {
73    const RESET_VALUE: u32 = 0;
74}
esp32c6/extmem/l1_cache_prelock_conf.rs

esp32c6/extmem/
l1_cache_prelock_conf.rs
