esp32c6/dma/ch/
outfifo_status.rs

1#[doc = "Register `OUTFIFO_STATUS` reader"]
2pub type R = crate::R<OUTFIFO_STATUS_SPEC>;
3#[doc = "Field `OUTFIFO_FULL` reader - L1 Tx FIFO full signal for Tx channel 0."]
4pub type OUTFIFO_FULL_R = crate::BitReader;
5#[doc = "Field `OUTFIFO_EMPTY` reader - L1 Tx FIFO empty signal for Tx channel 0."]
6pub type OUTFIFO_EMPTY_R = crate::BitReader;
7#[doc = "Field `OUTFIFO_CNT` reader - The register stores the byte number of the data in L1 Tx FIFO for Tx channel 0."]
8pub type OUTFIFO_CNT_R = crate::FieldReader;
9#[doc = "Field `OUT_REMAIN_UNDER_1B` reader - reserved"]
10pub type OUT_REMAIN_UNDER_1B_R = crate::BitReader;
11#[doc = "Field `OUT_REMAIN_UNDER_2B` reader - reserved"]
12pub type OUT_REMAIN_UNDER_2B_R = crate::BitReader;
13#[doc = "Field `OUT_REMAIN_UNDER_3B` reader - reserved"]
14pub type OUT_REMAIN_UNDER_3B_R = crate::BitReader;
15#[doc = "Field `OUT_REMAIN_UNDER_4B` reader - reserved"]
16pub type OUT_REMAIN_UNDER_4B_R = crate::BitReader;
17impl R {
18    #[doc = "Bit 0 - L1 Tx FIFO full signal for Tx channel 0."]
19    #[inline(always)]
20    pub fn outfifo_full(&self) -> OUTFIFO_FULL_R {
21        OUTFIFO_FULL_R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - L1 Tx FIFO empty signal for Tx channel 0."]
24    #[inline(always)]
25    pub fn outfifo_empty(&self) -> OUTFIFO_EMPTY_R {
26        OUTFIFO_EMPTY_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bits 2:7 - The register stores the byte number of the data in L1 Tx FIFO for Tx channel 0."]
29    #[inline(always)]
30    pub fn outfifo_cnt(&self) -> OUTFIFO_CNT_R {
31        OUTFIFO_CNT_R::new(((self.bits >> 2) & 0x3f) as u8)
32    }
33    #[doc = "Bit 23 - reserved"]
34    #[inline(always)]
35    pub fn out_remain_under_1b(&self) -> OUT_REMAIN_UNDER_1B_R {
36        OUT_REMAIN_UNDER_1B_R::new(((self.bits >> 23) & 1) != 0)
37    }
38    #[doc = "Bit 24 - reserved"]
39    #[inline(always)]
40    pub fn out_remain_under_2b(&self) -> OUT_REMAIN_UNDER_2B_R {
41        OUT_REMAIN_UNDER_2B_R::new(((self.bits >> 24) & 1) != 0)
42    }
43    #[doc = "Bit 25 - reserved"]
44    #[inline(always)]
45    pub fn out_remain_under_3b(&self) -> OUT_REMAIN_UNDER_3B_R {
46        OUT_REMAIN_UNDER_3B_R::new(((self.bits >> 25) & 1) != 0)
47    }
48    #[doc = "Bit 26 - reserved"]
49    #[inline(always)]
50    pub fn out_remain_under_4b(&self) -> OUT_REMAIN_UNDER_4B_R {
51        OUT_REMAIN_UNDER_4B_R::new(((self.bits >> 26) & 1) != 0)
52    }
53}
54#[cfg(feature = "impl-register-debug")]
55impl core::fmt::Debug for R {
56    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
57        f.debug_struct("OUTFIFO_STATUS")
58            .field("outfifo_full", &self.outfifo_full())
59            .field("outfifo_empty", &self.outfifo_empty())
60            .field("outfifo_cnt", &self.outfifo_cnt())
61            .field("out_remain_under_1b", &self.out_remain_under_1b())
62            .field("out_remain_under_2b", &self.out_remain_under_2b())
63            .field("out_remain_under_3b", &self.out_remain_under_3b())
64            .field("out_remain_under_4b", &self.out_remain_under_4b())
65            .finish()
66    }
67}
68#[doc = "Transmit FIFO status of Tx channel 0\n\nYou can [`read`](crate::Reg::read) this register and get [`outfifo_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
69pub struct OUTFIFO_STATUS_SPEC;
70impl crate::RegisterSpec for OUTFIFO_STATUS_SPEC {
71    type Ux = u32;
72}
73#[doc = "`read()` method returns [`outfifo_status::R`](R) reader structure"]
74impl crate::Readable for OUTFIFO_STATUS_SPEC {}
75#[doc = "`reset()` method sets OUTFIFO_STATUS to value 0x0780_0002"]
76impl crate::Resettable for OUTFIFO_STATUS_SPEC {
77    const RESET_VALUE: u32 = 0x0780_0002;
78}
esp32c6/dma/ch/outfifo_status.rs

esp32c6/dma/ch/
outfifo_status.rs
