esp32c6/dma/ch/
out_link.rs

1#[doc = "Register `OUT_LINK` reader"]
2pub type R = crate::R<OUT_LINK_SPEC>;
3#[doc = "Register `OUT_LINK` writer"]
4pub type W = crate::W<OUT_LINK_SPEC>;
5#[doc = "Field `OUTLINK_ADDR` reader - This register stores the 20 least significant bits of the first outlink descriptor's address."]
6pub type OUTLINK_ADDR_R = crate::FieldReader<u32>;
7#[doc = "Field `OUTLINK_ADDR` writer - This register stores the 20 least significant bits of the first outlink descriptor's address."]
8pub type OUTLINK_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>;
9#[doc = "Field `OUTLINK_STOP` writer - Set this bit to stop dealing with the outlink descriptors."]
10pub type OUTLINK_STOP_W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `OUTLINK_START` writer - Set this bit to start dealing with the outlink descriptors."]
12pub type OUTLINK_START_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `OUTLINK_RESTART` writer - Set this bit to restart a new outlink from the last address."]
14pub type OUTLINK_RESTART_W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `OUTLINK_PARK` reader - 1: the outlink descriptor's FSM is in idle state. 0: the outlink descriptor's FSM is working."]
16pub type OUTLINK_PARK_R = crate::BitReader;
17impl R {
18    #[doc = "Bits 0:19 - This register stores the 20 least significant bits of the first outlink descriptor's address."]
19    #[inline(always)]
20    pub fn outlink_addr(&self) -> OUTLINK_ADDR_R {
21        OUTLINK_ADDR_R::new(self.bits & 0x000f_ffff)
22    }
23    #[doc = "Bit 23 - 1: the outlink descriptor's FSM is in idle state. 0: the outlink descriptor's FSM is working."]
24    #[inline(always)]
25    pub fn outlink_park(&self) -> OUTLINK_PARK_R {
26        OUTLINK_PARK_R::new(((self.bits >> 23) & 1) != 0)
27    }
28}
29#[cfg(feature = "impl-register-debug")]
30impl core::fmt::Debug for R {
31    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
32        f.debug_struct("OUT_LINK")
33            .field("outlink_addr", &self.outlink_addr())
34            .field("outlink_park", &self.outlink_park())
35            .finish()
36    }
37}
38impl W {
39    #[doc = "Bits 0:19 - This register stores the 20 least significant bits of the first outlink descriptor's address."]
40    #[inline(always)]
41    pub fn outlink_addr(&mut self) -> OUTLINK_ADDR_W<OUT_LINK_SPEC> {
42        OUTLINK_ADDR_W::new(self, 0)
43    }
44    #[doc = "Bit 20 - Set this bit to stop dealing with the outlink descriptors."]
45    #[inline(always)]
46    pub fn outlink_stop(&mut self) -> OUTLINK_STOP_W<OUT_LINK_SPEC> {
47        OUTLINK_STOP_W::new(self, 20)
48    }
49    #[doc = "Bit 21 - Set this bit to start dealing with the outlink descriptors."]
50    #[inline(always)]
51    pub fn outlink_start(&mut self) -> OUTLINK_START_W<OUT_LINK_SPEC> {
52        OUTLINK_START_W::new(self, 21)
53    }
54    #[doc = "Bit 22 - Set this bit to restart a new outlink from the last address."]
55    #[inline(always)]
56    pub fn outlink_restart(&mut self) -> OUTLINK_RESTART_W<OUT_LINK_SPEC> {
57        OUTLINK_RESTART_W::new(self, 22)
58    }
59}
60#[doc = "Link descriptor configure and control register of Tx channel 0\n\nYou can [`read`](crate::Reg::read) this register and get [`out_link::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`out_link::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct OUT_LINK_SPEC;
62impl crate::RegisterSpec for OUT_LINK_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [`out_link::R`](R) reader structure"]
66impl crate::Readable for OUT_LINK_SPEC {}
67#[doc = "`write(|w| ..)` method takes [`out_link::W`](W) writer structure"]
68impl crate::Writable for OUT_LINK_SPEC {
69    type Safety = crate::Unsafe;
70    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
71    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72}
73#[doc = "`reset()` method sets OUT_LINK to value 0x0080_0000"]
74impl crate::Resettable for OUT_LINK_SPEC {
75    const RESET_VALUE: u32 = 0x0080_0000;
76}
esp32c6/dma/ch/out_link.rs

esp32c6/dma/ch/
out_link.rs
