Module esp32c6::extmem::l1_icache_ctrl

L1 instruction Cache(L1-ICache) control register

Structs

• L1_ICACHE_CTRL_SPEC
  L1 instruction Cache(L1-ICache) control register

Type Aliases

• L1_ICACHE_SHUT_IBUS0_R
  Field L1_ICACHE_SHUT_IBUS0 reader - The bit is used to disable core0 ibus access L1-ICache, 0: enable, 1: disable
• L1_ICACHE_SHUT_IBUS1_R
  Field L1_ICACHE_SHUT_IBUS1 reader - The bit is used to disable core1 ibus access L1-ICache, 0: enable, 1: disable
• L1_ICACHE_SHUT_IBUS2_R
  Field L1_ICACHE_SHUT_IBUS2 reader - Reserved
• L1_ICACHE_SHUT_IBUS3_R
  Field L1_ICACHE_SHUT_IBUS3 reader - Reserved
• L1_ICACHE_UNDEF_OP_R
  Field L1_ICACHE_UNDEF_OP reader - Reserved
• R
  Register L1_ICACHE_CTRL reader