Module esp32c6::spi0::spi_mem_cache_sctrl
source · Expand description
SPI0 external RAM control register
Structs
- SPI0 external RAM control register
Type Aliases
- Register
SPI_MEM_CACHE_SCTRLreader - Field
SPI_MEM_CACHE_SRAM_USR_RCMDreader - For SPI0, In the external RAM mode cache read external RAM for user define command. - Field
SPI_MEM_CACHE_SRAM_USR_WCMDreader - For SPI0, In the external RAM mode cache write sram for user define command - Field
SPI_MEM_CACHE_USR_SADDR_4BYTEreader - For SPI0, In the external RAM mode, cache read flash with 4 bytes command, 1: enable, 0:disable. - Field
SPI_MEM_SRAM_ADDR_BITLENreader - For SPI0, In the external RAM mode, it is the length in bits of address phase. The register value shall be (bit_num-1). - Field
SPI_MEM_SRAM_OCTreader - reserved - Field
SPI_MEM_SRAM_RDUMMY_CYCLELENreader - For SPI0, In the external RAM mode, it is the length in bits of read dummy phase. The register value shall be (bit_num-1). - Field
SPI_MEM_SRAM_WDUMMY_CYCLELENreader - For SPI0, In the external RAM mode, it is the length in bits of write dummy phase. The register value shall be (bit_num-1). - Field
SPI_MEM_USR_RD_SRAM_DUMMYreader - For SPI0, In the external RAM mode, it is the enable bit of dummy phase for read operations. - Field
SPI_MEM_USR_SRAM_DIOreader - For SPI0, In the external RAM mode, spi dual I/O mode enable, 1: enable, 0:disable - Field
SPI_MEM_USR_SRAM_QIOreader - For SPI0, In the external RAM mode, spi quad I/O mode enable, 1: enable, 0:disable - Field
SPI_MEM_USR_WR_SRAM_DUMMYreader - For SPI0, In the external RAM mode, it is the enable bit of dummy phase for write operations.