Expand description
SPI (Serial Peripheral Interface) Controller 0
Modules
- SPI1 flash ACE section %s start address register
- MSPI flash ACE section %s attribute register
- SPI1 flash ACE section %s start address register
- SPI0 AXI request error address.
- SPI0 bit mode control register.
- SPI0 external RAM control register
- SPI clock division control register.
- SPI0 clock gate register
- SPI0 FSM status register
- SPI0 control register.
- SPI0 control1 register.
- SPI0 control2 register.
- SPI0 version control register
- SPI0 flash DDR mode control register
- MSPI flash input timing delay mode control register
- MSPI flash input timing delay number control register
- MSPI flash output timing adjustment control register
- SPI memory cryption DPA register
- MSPI ECC control register
- MSPI ECC error address register
- SPI0 FSM status register
- SPI0 interrupt clear register
- SPI0 interrupt enable register
- SPI0 interrupt raw register
- SPI0 interrupt status register
- SPI0 misc register
- MSPI-MMU item content register
- MSPI-MMU item index register
- MSPI MMU power control register
- SPI1 access reject register
- SPI0 read control register.
- MSPI ECO high register
- MSPI ECO low register
- SPI0 external RAM clock control register
- SPI0 external RAM mode control register
- SPI0 external RAM DDR read command control register
- SPI0 external RAM DDR write command control register
- SPI0 flash timing calibration register
- SPI0 user register.
- SPI0 user1 register.
- SPI0 user2 register.
- Manual Encryption version register
- Manual Encryption destination register
- Manual Encryption physical address register
- Manual Encryption Line-Size register
- Manual Encryption physical address register
- The base address of the memory that stores plaintext in Manual Encryption
- Manual Encryption physical address register
- Manual Encryption physical address register
- Manual Encryption physical address register
- MSPI external RAM ECC and SPI CS timing control register
- SPI0 external RAM DDR mode control register
- MSPI external RAM input timing delay mode control register
- MSPI external RAM input timing delay number control register
- MSPI external RAM output timing adjustment control register
- MSPI ECC control register
- SPI1 external RAM ACE section %s start address register
- SPI1 flash ACE section %s start address register
- SPI1 external RAM ACE section %s start address register
- MSPI external RAM timing calibration register
Structs
- Register block
Type Aliases
- SPI_FMEM_PMS_ADDR (rw) register accessor: SPI1 flash ACE section %s start address register
- SPI_FMEM_PMS_ATTR (rw) register accessor: MSPI flash ACE section %s attribute register
- SPI_FMEM_PMS_SIZE (rw) register accessor: SPI1 flash ACE section %s start address register
- SPI_MEM_AXI_ERR_ADDR (r) register accessor: SPI0 AXI request error address.
- SPI_MEM_CACHE_FCTRL (rw) register accessor: SPI0 bit mode control register.
- SPI_MEM_CACHE_SCTRL (r) register accessor: SPI0 external RAM control register
- SPI_MEM_CLOCK (rw) register accessor: SPI clock division control register.
- SPI_MEM_CLOCK_GATE (rw) register accessor: SPI0 clock gate register
- SPI_MEM_CMD (r) register accessor: SPI0 FSM status register
- SPI_MEM_CTRL (rw) register accessor: SPI0 control register.
- SPI_MEM_CTRL1 (rw) register accessor: SPI0 control1 register.
- SPI_MEM_CTRL2 (rw) register accessor: SPI0 control2 register.
- SPI_MEM_DATE (rw) register accessor: SPI0 version control register
- SPI_MEM_DDR (r) register accessor: SPI0 flash DDR mode control register
- SPI_MEM_DIN_MODE (rw) register accessor: MSPI flash input timing delay mode control register
- SPI_MEM_DIN_NUM (rw) register accessor: MSPI flash input timing delay number control register
- SPI_MEM_DOUT_MODE (rw) register accessor: MSPI flash output timing adjustment control register
- SPI_MEM_DPA_CTRL (rw) register accessor: SPI memory cryption DPA register
- SPI_MEM_ECC_CTRL (rw) register accessor: MSPI ECC control register
- SPI_MEM_ECC_ERR_ADDR (r) register accessor: MSPI ECC error address register
- SPI_MEM_FSM (rw) register accessor: SPI0 FSM status register
- SPI_MEM_INT_CLR (rw) register accessor: SPI0 interrupt clear register
- SPI_MEM_INT_ENA (rw) register accessor: SPI0 interrupt enable register
- SPI_MEM_INT_RAW (rw) register accessor: SPI0 interrupt raw register
- SPI_MEM_INT_ST (r) register accessor: SPI0 interrupt status register
- SPI_MEM_MISC (rw) register accessor: SPI0 misc register
- SPI_MEM_MMU_ITEM_CONTENT (rw) register accessor: MSPI-MMU item content register
- SPI_MEM_MMU_ITEM_INDEX (rw) register accessor: MSPI-MMU item index register
- SPI_MEM_MMU_POWER_CTRL (rw) register accessor: MSPI MMU power control register
- SPI_MEM_PMS_REJECT (rw) register accessor: SPI1 access reject register
- SPI_MEM_RD_STATUS (rw) register accessor: SPI0 read control register.
- SPI_MEM_REGISTERRND_ECO_HIGH (r) register accessor: MSPI ECO high register
- SPI_MEM_REGISTERRND_ECO_LOW (r) register accessor: MSPI ECO low register
- SPI_MEM_SRAM_CLK (r) register accessor: SPI0 external RAM clock control register
- SPI_MEM_SRAM_CMD (rw) register accessor: SPI0 external RAM mode control register
- SPI_MEM_SRAM_DRD_CMD (r) register accessor: SPI0 external RAM DDR read command control register
- SPI_MEM_SRAM_DWR_CMD (r) register accessor: SPI0 external RAM DDR write command control register
- SPI_MEM_TIMING_CALI (rw) register accessor: SPI0 flash timing calibration register
- SPI_MEM_USER (rw) register accessor: SPI0 user register.
- SPI_MEM_USER1 (rw) register accessor: SPI0 user1 register.
- SPI_MEM_USER2 (rw) register accessor: SPI0 user2 register.
- SPI_MEM_XTS_DATE (rw) register accessor: Manual Encryption version register
- SPI_MEM_XTS_DESTINATION (rw) register accessor: Manual Encryption destination register
- SPI_MEM_XTS_DESTROY (w) register accessor: Manual Encryption physical address register
- SPI_MEM_XTS_LINESIZE (rw) register accessor: Manual Encryption Line-Size register
- SPI_MEM_XTS_PHYSICAL_ADDRESS (rw) register accessor: Manual Encryption physical address register
- SPI_MEM_XTS_PLAIN_BASE (rw) register accessor: The base address of the memory that stores plaintext in Manual Encryption
- SPI_MEM_XTS_RELEASE (w) register accessor: Manual Encryption physical address register
- SPI_MEM_XTS_STATE (r) register accessor: Manual Encryption physical address register
- SPI_MEM_XTS_TRIGGER (w) register accessor: Manual Encryption physical address register
- SPI_SMEM_AC (r) register accessor: MSPI external RAM ECC and SPI CS timing control register
- SPI_SMEM_DDR (r) register accessor: SPI0 external RAM DDR mode control register
- SPI_SMEM_DIN_MODE (r) register accessor: MSPI external RAM input timing delay mode control register
- SPI_SMEM_DIN_NUM (r) register accessor: MSPI external RAM input timing delay number control register
- SPI_SMEM_DOUT_MODE (r) register accessor: MSPI external RAM output timing adjustment control register
- SPI_SMEM_ECC_CTRL (r) register accessor: MSPI ECC control register
- SPI_SMEM_PMS_ADDR (rw) register accessor: SPI1 external RAM ACE section %s start address register
- SPI_SMEM_PMS_ATTR (rw) register accessor: SPI1 flash ACE section %s start address register
- SPI_SMEM_PMS_SIZE (rw) register accessor: SPI1 external RAM ACE section %s start address register
- SPI_SMEM_TIMING_CALI (r) register accessor: MSPI external RAM timing calibration register