esp32c6_lp/pmu/
int_clr.rs

1#[doc = "Register `INT_CLR` writer"]
2pub type W = crate::W<INT_CLR_SPEC>;
3#[doc = "Field `LP_CPU_EXC` writer - need_des"]
4pub type LP_CPU_EXC_W<'a, REG> = crate::BitWriter1C<'a, REG>;
5#[doc = "Field `SDIO_IDLE` writer - need_des"]
6pub type SDIO_IDLE_W<'a, REG> = crate::BitWriter1C<'a, REG>;
7#[doc = "Field `SW` writer - need_des"]
8pub type SW_W<'a, REG> = crate::BitWriter1C<'a, REG>;
9#[doc = "Field `SOC_SLEEP_REJECT` writer - need_des"]
10pub type SOC_SLEEP_REJECT_W<'a, REG> = crate::BitWriter1C<'a, REG>;
11#[doc = "Field `SOC_WAKEUP` writer - need_des"]
12pub type SOC_WAKEUP_W<'a, REG> = crate::BitWriter1C<'a, REG>;
13#[cfg(feature = "impl-register-debug")]
14impl core::fmt::Debug for crate::generic::Reg<INT_CLR_SPEC> {
15    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
16        write!(f, "(not readable)")
17    }
18}
19impl W {
20    #[doc = "Bit 27 - need_des"]
21    #[inline(always)]
22    #[must_use]
23    pub fn lp_cpu_exc(&mut self) -> LP_CPU_EXC_W<INT_CLR_SPEC> {
24        LP_CPU_EXC_W::new(self, 27)
25    }
26    #[doc = "Bit 28 - need_des"]
27    #[inline(always)]
28    #[must_use]
29    pub fn sdio_idle(&mut self) -> SDIO_IDLE_W<INT_CLR_SPEC> {
30        SDIO_IDLE_W::new(self, 28)
31    }
32    #[doc = "Bit 29 - need_des"]
33    #[inline(always)]
34    #[must_use]
35    pub fn sw(&mut self) -> SW_W<INT_CLR_SPEC> {
36        SW_W::new(self, 29)
37    }
38    #[doc = "Bit 30 - need_des"]
39    #[inline(always)]
40    #[must_use]
41    pub fn soc_sleep_reject(&mut self) -> SOC_SLEEP_REJECT_W<INT_CLR_SPEC> {
42        SOC_SLEEP_REJECT_W::new(self, 30)
43    }
44    #[doc = "Bit 31 - need_des"]
45    #[inline(always)]
46    #[must_use]
47    pub fn soc_wakeup(&mut self) -> SOC_WAKEUP_W<INT_CLR_SPEC> {
48        SOC_WAKEUP_W::new(self, 31)
49    }
50}
51#[doc = "need_des\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
52pub struct INT_CLR_SPEC;
53impl crate::RegisterSpec for INT_CLR_SPEC {
54    type Ux = u32;
55}
56#[doc = "`write(|w| ..)` method takes [`int_clr::W`](W) writer structure"]
57impl crate::Writable for INT_CLR_SPEC {
58    type Safety = crate::Unsafe;
59    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
60    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0xf800_0000;
61}
62#[doc = "`reset()` method sets INT_CLR to value 0"]
63impl crate::Resettable for INT_CLR_SPEC {
64    const RESET_VALUE: u32 = 0;
65}
esp32c6_lp/pmu/int_clr.rs

esp32c6_lp/pmu/
int_clr.rs
