esp32c6_lp/pmu/
imm_lp_icg.rs

1#[doc = "Register `IMM_LP_ICG` writer"]
2pub type W = crate::W<IMM_LP_ICG_SPEC>;
3#[doc = "Field `TIE_LOW_LP_ROOTCLK_SEL` writer - need_des"]
4pub type TIE_LOW_LP_ROOTCLK_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `TIE_HIGH_LP_ROOTCLK_SEL` writer - need_des"]
6pub type TIE_HIGH_LP_ROOTCLK_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
7#[cfg(feature = "impl-register-debug")]
8impl core::fmt::Debug for crate::generic::Reg<IMM_LP_ICG_SPEC> {
9    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
10        write!(f, "(not readable)")
11    }
12}
13impl W {
14    #[doc = "Bit 30 - need_des"]
15    #[inline(always)]
16    #[must_use]
17    pub fn tie_low_lp_rootclk_sel(&mut self) -> TIE_LOW_LP_ROOTCLK_SEL_W<IMM_LP_ICG_SPEC> {
18        TIE_LOW_LP_ROOTCLK_SEL_W::new(self, 30)
19    }
20    #[doc = "Bit 31 - need_des"]
21    #[inline(always)]
22    #[must_use]
23    pub fn tie_high_lp_rootclk_sel(&mut self) -> TIE_HIGH_LP_ROOTCLK_SEL_W<IMM_LP_ICG_SPEC> {
24        TIE_HIGH_LP_ROOTCLK_SEL_W::new(self, 31)
25    }
26}
27#[doc = "need_des\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`imm_lp_icg::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
28pub struct IMM_LP_ICG_SPEC;
29impl crate::RegisterSpec for IMM_LP_ICG_SPEC {
30    type Ux = u32;
31}
32#[doc = "`write(|w| ..)` method takes [`imm_lp_icg::W`](W) writer structure"]
33impl crate::Writable for IMM_LP_ICG_SPEC {
34    type Safety = crate::Unsafe;
35    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
36    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
37}
38#[doc = "`reset()` method sets IMM_LP_ICG to value 0"]
39impl crate::Resettable for IMM_LP_ICG_SPEC {
40    const RESET_VALUE: u32 = 0;
41}
esp32c6_lp/pmu/imm_lp_icg.rs

esp32c6_lp/pmu/
imm_lp_icg.rs
