esp32c6_lp/lp_timer/
int_st.rs

1#[doc = "Register `INT_ST` reader"]
2pub type R = crate::R<INT_ST_SPEC>;
3#[doc = "Field `OVERFLOW` reader - need_des"]
4pub type OVERFLOW_R = crate::BitReader;
5#[doc = "Field `SOC_WAKEUP` reader - need_des"]
6pub type SOC_WAKEUP_R = crate::BitReader;
7impl R {
8    #[doc = "Bit 30 - need_des"]
9    #[inline(always)]
10    pub fn overflow(&self) -> OVERFLOW_R {
11        OVERFLOW_R::new(((self.bits >> 30) & 1) != 0)
12    }
13    #[doc = "Bit 31 - need_des"]
14    #[inline(always)]
15    pub fn soc_wakeup(&self) -> SOC_WAKEUP_R {
16        SOC_WAKEUP_R::new(((self.bits >> 31) & 1) != 0)
17    }
18}
19#[cfg(feature = "impl-register-debug")]
20impl core::fmt::Debug for R {
21    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
22        f.debug_struct("INT_ST")
23            .field("overflow", &self.overflow())
24            .field("soc_wakeup", &self.soc_wakeup())
25            .finish()
26    }
27}
28#[doc = "need_des\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
29pub struct INT_ST_SPEC;
30impl crate::RegisterSpec for INT_ST_SPEC {
31    type Ux = u32;
32}
33#[doc = "`read()` method returns [`int_st::R`](R) reader structure"]
34impl crate::Readable for INT_ST_SPEC {}
35#[doc = "`reset()` method sets INT_ST to value 0"]
36impl crate::Resettable for INT_ST_SPEC {
37    const RESET_VALUE: u32 = 0;
38}
esp32c6_lp/lp_timer/int_st.rs

esp32c6_lp/lp_timer/
int_st.rs
