esp32c6_lp/lp_i2c0/
comd.rs

1#[doc = "Register `COMD%s` reader"]
2pub type R = crate::R<COMD_SPEC>;
3#[doc = "Register `COMD%s` writer"]
4pub type W = crate::W<COMD_SPEC>;
5#[doc = "Field `COMMAND` reader - This is the content of command 0. It consists of three parts: op_code is the command, 0: RSTART, 1: WRITE, 2: READ, 3: STOP, 4: END. Byte_num represents the number of bytes that need to be sent or received. ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd structure for more Information."]
6pub type COMMAND_R = crate::FieldReader<u16>;
7#[doc = "Field `COMMAND` writer - This is the content of command 0. It consists of three parts: op_code is the command, 0: RSTART, 1: WRITE, 2: READ, 3: STOP, 4: END. Byte_num represents the number of bytes that need to be sent or received. ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd structure for more Information."]
8pub type COMMAND_W<'a, REG> = crate::FieldWriter<'a, REG, 14, u16>;
9#[doc = "Field `COMMAND_DONE` reader - When command 0 is done in I2C Master mode, this bit changes to high level."]
10pub type COMMAND_DONE_R = crate::BitReader;
11#[doc = "Field `COMMAND_DONE` writer - When command 0 is done in I2C Master mode, this bit changes to high level."]
12pub type COMMAND_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bits 0:13 - This is the content of command 0. It consists of three parts: op_code is the command, 0: RSTART, 1: WRITE, 2: READ, 3: STOP, 4: END. Byte_num represents the number of bytes that need to be sent or received. ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd structure for more Information."]
15    #[inline(always)]
16    pub fn command(&self) -> COMMAND_R {
17        COMMAND_R::new((self.bits & 0x3fff) as u16)
18    }
19    #[doc = "Bit 31 - When command 0 is done in I2C Master mode, this bit changes to high level."]
20    #[inline(always)]
21    pub fn command_done(&self) -> COMMAND_DONE_R {
22        COMMAND_DONE_R::new(((self.bits >> 31) & 1) != 0)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("COMD")
29            .field("command", &self.command())
30            .field("command_done", &self.command_done())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bits 0:13 - This is the content of command 0. It consists of three parts: op_code is the command, 0: RSTART, 1: WRITE, 2: READ, 3: STOP, 4: END. Byte_num represents the number of bytes that need to be sent or received. ack_check_en, ack_exp and ack are used to control the ACK bit. See I2C cmd structure for more Information."]
36    #[inline(always)]
37    #[must_use]
38    pub fn command(&mut self) -> COMMAND_W<COMD_SPEC> {
39        COMMAND_W::new(self, 0)
40    }
41    #[doc = "Bit 31 - When command 0 is done in I2C Master mode, this bit changes to high level."]
42    #[inline(always)]
43    #[must_use]
44    pub fn command_done(&mut self) -> COMMAND_DONE_W<COMD_SPEC> {
45        COMMAND_DONE_W::new(self, 31)
46    }
47}
48#[doc = "I2C command register %s\n\nYou can [`read`](crate::Reg::read) this register and get [`comd::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comd::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
49pub struct COMD_SPEC;
50impl crate::RegisterSpec for COMD_SPEC {
51    type Ux = u32;
52}
53#[doc = "`read()` method returns [`comd::R`](R) reader structure"]
54impl crate::Readable for COMD_SPEC {}
55#[doc = "`write(|w| ..)` method takes [`comd::W`](W) writer structure"]
56impl crate::Writable for COMD_SPEC {
57    type Safety = crate::Unsafe;
58    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
59    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
60}
61#[doc = "`reset()` method sets COMD%s to value 0"]
62impl crate::Resettable for COMD_SPEC {
63    const RESET_VALUE: u32 = 0;
64}