esp32c6_lp/lp_clkrst/
rc32k_cntl.rs1#[doc = "Register `RC32K_CNTL` reader"]
2pub type R = crate::R<RC32K_CNTL_SPEC>;
3#[doc = "Register `RC32K_CNTL` writer"]
4pub type W = crate::W<RC32K_CNTL_SPEC>;
5#[doc = "Field `RC32K_DFREQ` reader - need_des"]
6pub type RC32K_DFREQ_R = crate::FieldReader<u16>;
7#[doc = "Field `RC32K_DFREQ` writer - need_des"]
8pub type RC32K_DFREQ_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
9impl R {
10 #[doc = "Bits 22:31 - need_des"]
11 #[inline(always)]
12 pub fn rc32k_dfreq(&self) -> RC32K_DFREQ_R {
13 RC32K_DFREQ_R::new(((self.bits >> 22) & 0x03ff) as u16)
14 }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19 f.debug_struct("RC32K_CNTL")
20 .field("rc32k_dfreq", &self.rc32k_dfreq())
21 .finish()
22 }
23}
24impl W {
25 #[doc = "Bits 22:31 - need_des"]
26 #[inline(always)]
27 #[must_use]
28 pub fn rc32k_dfreq(&mut self) -> RC32K_DFREQ_W<RC32K_CNTL_SPEC> {
29 RC32K_DFREQ_W::new(self, 22)
30 }
31}
32#[doc = "need_des\n\nYou can [`read`](crate::Reg::read) this register and get [`rc32k_cntl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rc32k_cntl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
33pub struct RC32K_CNTL_SPEC;
34impl crate::RegisterSpec for RC32K_CNTL_SPEC {
35 type Ux = u32;
36}
37#[doc = "`read()` method returns [`rc32k_cntl::R`](R) reader structure"]
38impl crate::Readable for RC32K_CNTL_SPEC {}
39#[doc = "`write(|w| ..)` method takes [`rc32k_cntl::W`](W) writer structure"]
40impl crate::Writable for RC32K_CNTL_SPEC {
41 type Safety = crate::Unsafe;
42 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
43 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
44}
45#[doc = "`reset()` method sets RC32K_CNTL to value 0x2b00_0000"]
46impl crate::Resettable for RC32K_CNTL_SPEC {
47 const RESET_VALUE: u32 = 0x2b00_0000;
48}