esp32c6_lp/lp_aon/
sar_cct.rs

1#[doc = "Register `SAR_CCT` reader"]
2pub type R = crate::R<SAR_CCT_SPEC>;
3#[doc = "Register `SAR_CCT` writer"]
4pub type W = crate::W<SAR_CCT_SPEC>;
5#[doc = "Field `SAR2_PWDET_CCT` reader - need_des"]
6pub type SAR2_PWDET_CCT_R = crate::FieldReader;
7#[doc = "Field `SAR2_PWDET_CCT` writer - need_des"]
8pub type SAR2_PWDET_CCT_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9impl R {
10    #[doc = "Bits 29:31 - need_des"]
11    #[inline(always)]
12    pub fn sar2_pwdet_cct(&self) -> SAR2_PWDET_CCT_R {
13        SAR2_PWDET_CCT_R::new(((self.bits >> 29) & 7) as u8)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("SAR_CCT")
20            .field("sar2_pwdet_cct", &self.sar2_pwdet_cct())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bits 29:31 - need_des"]
26    #[inline(always)]
27    #[must_use]
28    pub fn sar2_pwdet_cct(&mut self) -> SAR2_PWDET_CCT_W<SAR_CCT_SPEC> {
29        SAR2_PWDET_CCT_W::new(self, 29)
30    }
31}
32#[doc = "need_des\n\nYou can [`read`](crate::Reg::read) this register and get [`sar_cct::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar_cct::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
33pub struct SAR_CCT_SPEC;
34impl crate::RegisterSpec for SAR_CCT_SPEC {
35    type Ux = u32;
36}
37#[doc = "`read()` method returns [`sar_cct::R`](R) reader structure"]
38impl crate::Readable for SAR_CCT_SPEC {}
39#[doc = "`write(|w| ..)` method takes [`sar_cct::W`](W) writer structure"]
40impl crate::Writable for SAR_CCT_SPEC {
41    type Safety = crate::Unsafe;
42    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
43    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
44}
45#[doc = "`reset()` method sets SAR_CCT to value 0"]
46impl crate::Resettable for SAR_CCT_SPEC {
47    const RESET_VALUE: u32 = 0;
48}
esp32c6_lp/lp_aon/sar_cct.rs

esp32c6_lp/lp_aon/
sar_cct.rs
