esp32c6_lp/pmu/
slp_wakeup_cntl5.rs

1#[doc = "Register `SLP_WAKEUP_CNTL5` reader"]
2pub type R = crate::R<SLP_WAKEUP_CNTL5_SPEC>;
3#[doc = "Register `SLP_WAKEUP_CNTL5` writer"]
4pub type W = crate::W<SLP_WAKEUP_CNTL5_SPEC>;
5#[doc = "Field `MODEM_WAIT_TARGET` reader - need_des"]
6pub type MODEM_WAIT_TARGET_R = crate::FieldReader<u32>;
7#[doc = "Field `MODEM_WAIT_TARGET` writer - need_des"]
8pub type MODEM_WAIT_TARGET_W<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>;
9#[doc = "Field `LP_ANA_WAIT_TARGET` reader - need_des"]
10pub type LP_ANA_WAIT_TARGET_R = crate::FieldReader;
11#[doc = "Field `LP_ANA_WAIT_TARGET` writer - need_des"]
12pub type LP_ANA_WAIT_TARGET_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13impl R {
14    #[doc = "Bits 0:19 - need_des"]
15    #[inline(always)]
16    pub fn modem_wait_target(&self) -> MODEM_WAIT_TARGET_R {
17        MODEM_WAIT_TARGET_R::new(self.bits & 0x000f_ffff)
18    }
19    #[doc = "Bits 24:31 - need_des"]
20    #[inline(always)]
21    pub fn lp_ana_wait_target(&self) -> LP_ANA_WAIT_TARGET_R {
22        LP_ANA_WAIT_TARGET_R::new(((self.bits >> 24) & 0xff) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("SLP_WAKEUP_CNTL5")
29            .field("modem_wait_target", &self.modem_wait_target())
30            .field("lp_ana_wait_target", &self.lp_ana_wait_target())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bits 0:19 - need_des"]
36    #[inline(always)]
37    #[must_use]
38    pub fn modem_wait_target(&mut self) -> MODEM_WAIT_TARGET_W<SLP_WAKEUP_CNTL5_SPEC> {
39        MODEM_WAIT_TARGET_W::new(self, 0)
40    }
41    #[doc = "Bits 24:31 - need_des"]
42    #[inline(always)]
43    #[must_use]
44    pub fn lp_ana_wait_target(&mut self) -> LP_ANA_WAIT_TARGET_W<SLP_WAKEUP_CNTL5_SPEC> {
45        LP_ANA_WAIT_TARGET_W::new(self, 24)
46    }
47}
48#[doc = "need_des\n\nYou can [`read`](crate::Reg::read) this register and get [`slp_wakeup_cntl5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`slp_wakeup_cntl5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
49pub struct SLP_WAKEUP_CNTL5_SPEC;
50impl crate::RegisterSpec for SLP_WAKEUP_CNTL5_SPEC {
51    type Ux = u32;
52}
53#[doc = "`read()` method returns [`slp_wakeup_cntl5::R`](R) reader structure"]
54impl crate::Readable for SLP_WAKEUP_CNTL5_SPEC {}
55#[doc = "`write(|w| ..)` method takes [`slp_wakeup_cntl5::W`](W) writer structure"]
56impl crate::Writable for SLP_WAKEUP_CNTL5_SPEC {
57    type Safety = crate::Unsafe;
58    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
59    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
60}
61#[doc = "`reset()` method sets SLP_WAKEUP_CNTL5 to value 0x0100_0080"]
62impl crate::Resettable for SLP_WAKEUP_CNTL5_SPEC {
63    const RESET_VALUE: u32 = 0x0100_0080;
64}
esp32c6_lp/pmu/slp_wakeup_cntl5.rs

esp32c6_lp/pmu/
slp_wakeup_cntl5.rs
