esp32c6_lp/pmu/
clk_state2.rs

1#[doc = "Register `CLK_STATE2` reader"]
2pub type R = crate::R<CLK_STATE2_SPEC>;
3#[doc = "Field `ICG_APB_EN_STATE` reader - need_des"]
4pub type ICG_APB_EN_STATE_R = crate::FieldReader<u32>;
5impl R {
6    #[doc = "Bits 0:31 - need_des"]
7    #[inline(always)]
8    pub fn icg_apb_en_state(&self) -> ICG_APB_EN_STATE_R {
9        ICG_APB_EN_STATE_R::new(self.bits)
10    }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("CLK_STATE2")
16            .field("icg_apb_en_state", &self.icg_apb_en_state())
17            .finish()
18    }
19}
20#[doc = "need_des\n\nYou can [`read`](crate::Reg::read) this register and get [`clk_state2::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct CLK_STATE2_SPEC;
22impl crate::RegisterSpec for CLK_STATE2_SPEC {
23    type Ux = u32;
24}
25#[doc = "`read()` method returns [`clk_state2::R`](R) reader structure"]
26impl crate::Readable for CLK_STATE2_SPEC {}
27#[doc = "`reset()` method sets CLK_STATE2 to value 0xffff_ffff"]
28impl crate::Resettable for CLK_STATE2_SPEC {
29    const RESET_VALUE: u32 = 0xffff_ffff;
30}
esp32c6_lp/pmu/clk_state2.rs

esp32c6_lp/pmu/
clk_state2.rs
