esp32c6_lp/pmu/
clk_state0.rs

1#[doc = "Register `CLK_STATE0` reader"]
2pub type R = crate::R<CLK_STATE0_SPEC>;
3#[doc = "Field `STABLE_XPD_BBPLL_STATE` reader - need_des"]
4pub type STABLE_XPD_BBPLL_STATE_R = crate::BitReader;
5#[doc = "Field `STABLE_XPD_XTAL_STATE` reader - need_des"]
6pub type STABLE_XPD_XTAL_STATE_R = crate::BitReader;
7#[doc = "Field `SYS_CLK_SLP_SEL_STATE` reader - need_des"]
8pub type SYS_CLK_SLP_SEL_STATE_R = crate::BitReader;
9#[doc = "Field `SYS_CLK_SEL_STATE` reader - need_des"]
10pub type SYS_CLK_SEL_STATE_R = crate::FieldReader;
11#[doc = "Field `SYS_CLK_NO_DIV_STATE` reader - need_des"]
12pub type SYS_CLK_NO_DIV_STATE_R = crate::BitReader;
13#[doc = "Field `ICG_SYS_CLK_EN_STATE` reader - need_des"]
14pub type ICG_SYS_CLK_EN_STATE_R = crate::BitReader;
15#[doc = "Field `ICG_MODEM_SWITCH_STATE` reader - need_des"]
16pub type ICG_MODEM_SWITCH_STATE_R = crate::BitReader;
17#[doc = "Field `ICG_MODEM_CODE_STATE` reader - need_des"]
18pub type ICG_MODEM_CODE_STATE_R = crate::FieldReader;
19#[doc = "Field `ICG_SLP_SEL_STATE` reader - need_des"]
20pub type ICG_SLP_SEL_STATE_R = crate::BitReader;
21#[doc = "Field `ICG_GLOBAL_XTAL_STATE` reader - need_des"]
22pub type ICG_GLOBAL_XTAL_STATE_R = crate::BitReader;
23#[doc = "Field `ICG_GLOBAL_PLL_STATE` reader - need_des"]
24pub type ICG_GLOBAL_PLL_STATE_R = crate::BitReader;
25#[doc = "Field `ANA_I2C_ISO_EN_STATE` reader - need_des"]
26pub type ANA_I2C_ISO_EN_STATE_R = crate::BitReader;
27#[doc = "Field `ANA_I2C_RETENTION_STATE` reader - need_des"]
28pub type ANA_I2C_RETENTION_STATE_R = crate::BitReader;
29#[doc = "Field `ANA_XPD_BB_I2C_STATE` reader - need_des"]
30pub type ANA_XPD_BB_I2C_STATE_R = crate::BitReader;
31#[doc = "Field `ANA_XPD_BBPLL_I2C_STATE` reader - need_des"]
32pub type ANA_XPD_BBPLL_I2C_STATE_R = crate::BitReader;
33#[doc = "Field `ANA_XPD_BBPLL_STATE` reader - need_des"]
34pub type ANA_XPD_BBPLL_STATE_R = crate::BitReader;
35#[doc = "Field `ANA_XPD_XTAL_STATE` reader - need_des"]
36pub type ANA_XPD_XTAL_STATE_R = crate::BitReader;
37impl R {
38    #[doc = "Bit 0 - need_des"]
39    #[inline(always)]
40    pub fn stable_xpd_bbpll_state(&self) -> STABLE_XPD_BBPLL_STATE_R {
41        STABLE_XPD_BBPLL_STATE_R::new((self.bits & 1) != 0)
42    }
43    #[doc = "Bit 1 - need_des"]
44    #[inline(always)]
45    pub fn stable_xpd_xtal_state(&self) -> STABLE_XPD_XTAL_STATE_R {
46        STABLE_XPD_XTAL_STATE_R::new(((self.bits >> 1) & 1) != 0)
47    }
48    #[doc = "Bit 15 - need_des"]
49    #[inline(always)]
50    pub fn sys_clk_slp_sel_state(&self) -> SYS_CLK_SLP_SEL_STATE_R {
51        SYS_CLK_SLP_SEL_STATE_R::new(((self.bits >> 15) & 1) != 0)
52    }
53    #[doc = "Bits 16:17 - need_des"]
54    #[inline(always)]
55    pub fn sys_clk_sel_state(&self) -> SYS_CLK_SEL_STATE_R {
56        SYS_CLK_SEL_STATE_R::new(((self.bits >> 16) & 3) as u8)
57    }
58    #[doc = "Bit 18 - need_des"]
59    #[inline(always)]
60    pub fn sys_clk_no_div_state(&self) -> SYS_CLK_NO_DIV_STATE_R {
61        SYS_CLK_NO_DIV_STATE_R::new(((self.bits >> 18) & 1) != 0)
62    }
63    #[doc = "Bit 19 - need_des"]
64    #[inline(always)]
65    pub fn icg_sys_clk_en_state(&self) -> ICG_SYS_CLK_EN_STATE_R {
66        ICG_SYS_CLK_EN_STATE_R::new(((self.bits >> 19) & 1) != 0)
67    }
68    #[doc = "Bit 20 - need_des"]
69    #[inline(always)]
70    pub fn icg_modem_switch_state(&self) -> ICG_MODEM_SWITCH_STATE_R {
71        ICG_MODEM_SWITCH_STATE_R::new(((self.bits >> 20) & 1) != 0)
72    }
73    #[doc = "Bits 21:22 - need_des"]
74    #[inline(always)]
75    pub fn icg_modem_code_state(&self) -> ICG_MODEM_CODE_STATE_R {
76        ICG_MODEM_CODE_STATE_R::new(((self.bits >> 21) & 3) as u8)
77    }
78    #[doc = "Bit 23 - need_des"]
79    #[inline(always)]
80    pub fn icg_slp_sel_state(&self) -> ICG_SLP_SEL_STATE_R {
81        ICG_SLP_SEL_STATE_R::new(((self.bits >> 23) & 1) != 0)
82    }
83    #[doc = "Bit 24 - need_des"]
84    #[inline(always)]
85    pub fn icg_global_xtal_state(&self) -> ICG_GLOBAL_XTAL_STATE_R {
86        ICG_GLOBAL_XTAL_STATE_R::new(((self.bits >> 24) & 1) != 0)
87    }
88    #[doc = "Bit 25 - need_des"]
89    #[inline(always)]
90    pub fn icg_global_pll_state(&self) -> ICG_GLOBAL_PLL_STATE_R {
91        ICG_GLOBAL_PLL_STATE_R::new(((self.bits >> 25) & 1) != 0)
92    }
93    #[doc = "Bit 26 - need_des"]
94    #[inline(always)]
95    pub fn ana_i2c_iso_en_state(&self) -> ANA_I2C_ISO_EN_STATE_R {
96        ANA_I2C_ISO_EN_STATE_R::new(((self.bits >> 26) & 1) != 0)
97    }
98    #[doc = "Bit 27 - need_des"]
99    #[inline(always)]
100    pub fn ana_i2c_retention_state(&self) -> ANA_I2C_RETENTION_STATE_R {
101        ANA_I2C_RETENTION_STATE_R::new(((self.bits >> 27) & 1) != 0)
102    }
103    #[doc = "Bit 28 - need_des"]
104    #[inline(always)]
105    pub fn ana_xpd_bb_i2c_state(&self) -> ANA_XPD_BB_I2C_STATE_R {
106        ANA_XPD_BB_I2C_STATE_R::new(((self.bits >> 28) & 1) != 0)
107    }
108    #[doc = "Bit 29 - need_des"]
109    #[inline(always)]
110    pub fn ana_xpd_bbpll_i2c_state(&self) -> ANA_XPD_BBPLL_I2C_STATE_R {
111        ANA_XPD_BBPLL_I2C_STATE_R::new(((self.bits >> 29) & 1) != 0)
112    }
113    #[doc = "Bit 30 - need_des"]
114    #[inline(always)]
115    pub fn ana_xpd_bbpll_state(&self) -> ANA_XPD_BBPLL_STATE_R {
116        ANA_XPD_BBPLL_STATE_R::new(((self.bits >> 30) & 1) != 0)
117    }
118    #[doc = "Bit 31 - need_des"]
119    #[inline(always)]
120    pub fn ana_xpd_xtal_state(&self) -> ANA_XPD_XTAL_STATE_R {
121        ANA_XPD_XTAL_STATE_R::new(((self.bits >> 31) & 1) != 0)
122    }
123}
124#[cfg(feature = "impl-register-debug")]
125impl core::fmt::Debug for R {
126    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
127        f.debug_struct("CLK_STATE0")
128            .field("stable_xpd_bbpll_state", &self.stable_xpd_bbpll_state())
129            .field("stable_xpd_xtal_state", &self.stable_xpd_xtal_state())
130            .field("sys_clk_slp_sel_state", &self.sys_clk_slp_sel_state())
131            .field("sys_clk_sel_state", &self.sys_clk_sel_state())
132            .field("sys_clk_no_div_state", &self.sys_clk_no_div_state())
133            .field("icg_sys_clk_en_state", &self.icg_sys_clk_en_state())
134            .field("icg_modem_switch_state", &self.icg_modem_switch_state())
135            .field("icg_modem_code_state", &self.icg_modem_code_state())
136            .field("icg_slp_sel_state", &self.icg_slp_sel_state())
137            .field("icg_global_xtal_state", &self.icg_global_xtal_state())
138            .field("icg_global_pll_state", &self.icg_global_pll_state())
139            .field("ana_i2c_iso_en_state", &self.ana_i2c_iso_en_state())
140            .field("ana_i2c_retention_state", &self.ana_i2c_retention_state())
141            .field("ana_xpd_bb_i2c_state", &self.ana_xpd_bb_i2c_state())
142            .field("ana_xpd_bbpll_i2c_state", &self.ana_xpd_bbpll_i2c_state())
143            .field("ana_xpd_bbpll_state", &self.ana_xpd_bbpll_state())
144            .field("ana_xpd_xtal_state", &self.ana_xpd_xtal_state())
145            .finish()
146    }
147}
148#[doc = "need_des\n\nYou can [`read`](crate::Reg::read) this register and get [`clk_state0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
149pub struct CLK_STATE0_SPEC;
150impl crate::RegisterSpec for CLK_STATE0_SPEC {
151    type Ux = u32;
152}
153#[doc = "`read()` method returns [`clk_state0::R`](R) reader structure"]
154impl crate::Readable for CLK_STATE0_SPEC {}
155#[doc = "`reset()` method sets CLK_STATE0 to value 0x03"]
156impl crate::Resettable for CLK_STATE0_SPEC {
157    const RESET_VALUE: u32 = 0x03;
158}
esp32c6_lp/pmu/clk_state0.rs

esp32c6_lp/pmu/
clk_state0.rs
