esp32c6_lp/lp_uart/
mem_tx_status.rs

1#[doc = "Register `MEM_TX_STATUS` reader"]
2pub type R = crate::R<MEM_TX_STATUS_SPEC>;
3#[doc = "Field `TX_SRAM_WADDR` reader - This register stores the offset write address in Tx-SRAM."]
4pub type TX_SRAM_WADDR_R = crate::FieldReader;
5#[doc = "Field `TX_SRAM_RADDR` reader - This register stores the offset read address in Tx-SRAM."]
6pub type TX_SRAM_RADDR_R = crate::FieldReader;
7impl R {
8    #[doc = "Bits 3:7 - This register stores the offset write address in Tx-SRAM."]
9    #[inline(always)]
10    pub fn tx_sram_waddr(&self) -> TX_SRAM_WADDR_R {
11        TX_SRAM_WADDR_R::new(((self.bits >> 3) & 0x1f) as u8)
12    }
13    #[doc = "Bits 12:16 - This register stores the offset read address in Tx-SRAM."]
14    #[inline(always)]
15    pub fn tx_sram_raddr(&self) -> TX_SRAM_RADDR_R {
16        TX_SRAM_RADDR_R::new(((self.bits >> 12) & 0x1f) as u8)
17    }
18}
19#[cfg(feature = "impl-register-debug")]
20impl core::fmt::Debug for R {
21    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
22        f.debug_struct("MEM_TX_STATUS")
23            .field("tx_sram_waddr", &self.tx_sram_waddr())
24            .field("tx_sram_raddr", &self.tx_sram_raddr())
25            .finish()
26    }
27}
28#[doc = "Tx-SRAM write and read offset address.\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_tx_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
29pub struct MEM_TX_STATUS_SPEC;
30impl crate::RegisterSpec for MEM_TX_STATUS_SPEC {
31    type Ux = u32;
32}
33#[doc = "`read()` method returns [`mem_tx_status::R`](R) reader structure"]
34impl crate::Readable for MEM_TX_STATUS_SPEC {}
35#[doc = "`reset()` method sets MEM_TX_STATUS to value 0"]
36impl crate::Resettable for MEM_TX_STATUS_SPEC {
37    const RESET_VALUE: u32 = 0;
38}
esp32c6_lp/lp_uart/mem_tx_status.rs

esp32c6_lp/lp_uart/
mem_tx_status.rs
