esp32c6_lp/lp_uart/
idle_conf_sync.rs1#[doc = "Register `IDLE_CONF_SYNC` reader"]
2pub type R = crate::R<IDLE_CONF_SYNC_SPEC>;
3#[doc = "Register `IDLE_CONF_SYNC` writer"]
4pub type W = crate::W<IDLE_CONF_SYNC_SPEC>;
5#[doc = "Field `RX_IDLE_THRHD` reader - It will produce frame end signal when receiver takes more time to receive one byte data than this register value."]
6pub type RX_IDLE_THRHD_R = crate::FieldReader<u16>;
7#[doc = "Field `RX_IDLE_THRHD` writer - It will produce frame end signal when receiver takes more time to receive one byte data than this register value."]
8pub type RX_IDLE_THRHD_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
9#[doc = "Field `TX_IDLE_NUM` reader - This register is used to configure the duration time between transfers."]
10pub type TX_IDLE_NUM_R = crate::FieldReader<u16>;
11#[doc = "Field `TX_IDLE_NUM` writer - This register is used to configure the duration time between transfers."]
12pub type TX_IDLE_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
13impl R {
14 #[doc = "Bits 0:9 - It will produce frame end signal when receiver takes more time to receive one byte data than this register value."]
15 #[inline(always)]
16 pub fn rx_idle_thrhd(&self) -> RX_IDLE_THRHD_R {
17 RX_IDLE_THRHD_R::new((self.bits & 0x03ff) as u16)
18 }
19 #[doc = "Bits 10:19 - This register is used to configure the duration time between transfers."]
20 #[inline(always)]
21 pub fn tx_idle_num(&self) -> TX_IDLE_NUM_R {
22 TX_IDLE_NUM_R::new(((self.bits >> 10) & 0x03ff) as u16)
23 }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28 f.debug_struct("IDLE_CONF_SYNC")
29 .field("rx_idle_thrhd", &self.rx_idle_thrhd())
30 .field("tx_idle_num", &self.tx_idle_num())
31 .finish()
32 }
33}
34impl W {
35 #[doc = "Bits 0:9 - It will produce frame end signal when receiver takes more time to receive one byte data than this register value."]
36 #[inline(always)]
37 #[must_use]
38 pub fn rx_idle_thrhd(&mut self) -> RX_IDLE_THRHD_W<IDLE_CONF_SYNC_SPEC> {
39 RX_IDLE_THRHD_W::new(self, 0)
40 }
41 #[doc = "Bits 10:19 - This register is used to configure the duration time between transfers."]
42 #[inline(always)]
43 #[must_use]
44 pub fn tx_idle_num(&mut self) -> TX_IDLE_NUM_W<IDLE_CONF_SYNC_SPEC> {
45 TX_IDLE_NUM_W::new(self, 10)
46 }
47}
48#[doc = "Frame-end idle configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`idle_conf_sync::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`idle_conf_sync::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
49pub struct IDLE_CONF_SYNC_SPEC;
50impl crate::RegisterSpec for IDLE_CONF_SYNC_SPEC {
51 type Ux = u32;
52}
53#[doc = "`read()` method returns [`idle_conf_sync::R`](R) reader structure"]
54impl crate::Readable for IDLE_CONF_SYNC_SPEC {}
55#[doc = "`write(|w| ..)` method takes [`idle_conf_sync::W`](W) writer structure"]
56impl crate::Writable for IDLE_CONF_SYNC_SPEC {
57 type Safety = crate::Unsafe;
58 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
59 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
60}
61#[doc = "`reset()` method sets IDLE_CONF_SYNC to value 0x0004_0100"]
62impl crate::Resettable for IDLE_CONF_SYNC_SPEC {
63 const RESET_VALUE: u32 = 0x0004_0100;
64}