esp32c6_lp/lp_uart/
hwfc_conf_sync.rs

1#[doc = "Register `HWFC_CONF_SYNC` reader"]
2pub type R = crate::R<HWFC_CONF_SYNC_SPEC>;
3#[doc = "Register `HWFC_CONF_SYNC` writer"]
4pub type W = crate::W<HWFC_CONF_SYNC_SPEC>;
5#[doc = "Field `RX_FLOW_THRHD` reader - This register is used to configure the maximum amount of data that can be received when hardware flow control works."]
6pub type RX_FLOW_THRHD_R = crate::FieldReader;
7#[doc = "Field `RX_FLOW_THRHD` writer - This register is used to configure the maximum amount of data that can be received when hardware flow control works."]
8pub type RX_FLOW_THRHD_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
9#[doc = "Field `RX_FLOW_EN` reader - This is the flow enable bit for UART receiver."]
10pub type RX_FLOW_EN_R = crate::BitReader;
11#[doc = "Field `RX_FLOW_EN` writer - This is the flow enable bit for UART receiver."]
12pub type RX_FLOW_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bits 3:7 - This register is used to configure the maximum amount of data that can be received when hardware flow control works."]
15    #[inline(always)]
16    pub fn rx_flow_thrhd(&self) -> RX_FLOW_THRHD_R {
17        RX_FLOW_THRHD_R::new(((self.bits >> 3) & 0x1f) as u8)
18    }
19    #[doc = "Bit 8 - This is the flow enable bit for UART receiver."]
20    #[inline(always)]
21    pub fn rx_flow_en(&self) -> RX_FLOW_EN_R {
22        RX_FLOW_EN_R::new(((self.bits >> 8) & 1) != 0)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("HWFC_CONF_SYNC")
29            .field("rx_flow_thrhd", &self.rx_flow_thrhd())
30            .field("rx_flow_en", &self.rx_flow_en())
31            .finish()
32    }
33}
34impl W {
35    #[doc = "Bits 3:7 - This register is used to configure the maximum amount of data that can be received when hardware flow control works."]
36    #[inline(always)]
37    #[must_use]
38    pub fn rx_flow_thrhd(&mut self) -> RX_FLOW_THRHD_W<HWFC_CONF_SYNC_SPEC> {
39        RX_FLOW_THRHD_W::new(self, 3)
40    }
41    #[doc = "Bit 8 - This is the flow enable bit for UART receiver."]
42    #[inline(always)]
43    #[must_use]
44    pub fn rx_flow_en(&mut self) -> RX_FLOW_EN_W<HWFC_CONF_SYNC_SPEC> {
45        RX_FLOW_EN_W::new(self, 8)
46    }
47}
48#[doc = "Hardware flow-control configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`hwfc_conf_sync::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hwfc_conf_sync::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
49pub struct HWFC_CONF_SYNC_SPEC;
50impl crate::RegisterSpec for HWFC_CONF_SYNC_SPEC {
51    type Ux = u32;
52}
53#[doc = "`read()` method returns [`hwfc_conf_sync::R`](R) reader structure"]
54impl crate::Readable for HWFC_CONF_SYNC_SPEC {}
55#[doc = "`write(|w| ..)` method takes [`hwfc_conf_sync::W`](W) writer structure"]
56impl crate::Writable for HWFC_CONF_SYNC_SPEC {
57    type Safety = crate::Unsafe;
58    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
59    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
60}
61#[doc = "`reset()` method sets HWFC_CONF_SYNC to value 0"]
62impl crate::Resettable for HWFC_CONF_SYNC_SPEC {
63    const RESET_VALUE: u32 = 0;
64}
esp32c6_lp/lp_uart/hwfc_conf_sync.rs

esp32c6_lp/lp_uart/
hwfc_conf_sync.rs
