Module esp32c6_lp::lp_i2c0::fifo_conf
source · Expand description
FIFO configuration register.
Structs§
- FIFO configuration register.
Type Aliases§
- Field
FIFO_PRT_ENreader - The control enable bit of FIFO pointer in non-fifo access mode. This bit controls the valid bits and the interrupts of tx/rx_fifo overflow, underflow, full and empty. - Field
FIFO_PRT_ENwriter - The control enable bit of FIFO pointer in non-fifo access mode. This bit controls the valid bits and the interrupts of tx/rx_fifo overflow, underflow, full and empty. - Field
NONFIFO_ENreader - Set this bit to enable APB nonfifo access. - Field
NONFIFO_ENwriter - Set this bit to enable APB nonfifo access. - Register
FIFO_CONFreader - Field
RXFIFO_WM_THRHDreader - The water mark threshold of rx FIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and rx FIFO counter is bigger than reg_rxfifo_wm_thrhd[3:0], reg_rxfifo_wm_int_raw bit will be valid. - Field
RXFIFO_WM_THRHDwriter - The water mark threshold of rx FIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and rx FIFO counter is bigger than reg_rxfifo_wm_thrhd[3:0], reg_rxfifo_wm_int_raw bit will be valid. - Field
RX_FIFO_RSTreader - Set this bit to reset rx-fifo. - Field
RX_FIFO_RSTwriter - Set this bit to reset rx-fifo. - Field
TXFIFO_WM_THRHDreader - The water mark threshold of tx FIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and tx FIFO counter is smaller than reg_txfifo_wm_thrhd[3:0], reg_txfifo_wm_int_raw bit will be valid. - Field
TXFIFO_WM_THRHDwriter - The water mark threshold of tx FIFO in nonfifo access mode. When reg_reg_fifo_prt_en is 1 and tx FIFO counter is smaller than reg_txfifo_wm_thrhd[3:0], reg_txfifo_wm_int_raw bit will be valid. - Field
TX_FIFO_RSTreader - Set this bit to reset tx-fifo. - Field
TX_FIFO_RSTwriter - Set this bit to reset tx-fifo. - Register
FIFO_CONFwriter