Module esp32c6_lp::lp_uart::int_raw

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Raw interrupt status

Structs

Type Aliases

  • AT_CMD_CHAR_DET_INT_RAW_R
    Field AT_CMD_CHAR_DET_INT_RAW reader - This interrupt raw bit turns to high level when receiver detects the configured at_cmd char.
  • AT_CMD_CHAR_DET_INT_RAW_W
    Field AT_CMD_CHAR_DET_INT_RAW writer - This interrupt raw bit turns to high level when receiver detects the configured at_cmd char.
  • BRK_DET_INT_RAW_R
    Field BRK_DET_INT_RAW reader - This interrupt raw bit turns to high level when receiver detects a 0 after the stop bit.
  • BRK_DET_INT_RAW_W
    Field BRK_DET_INT_RAW writer - This interrupt raw bit turns to high level when receiver detects a 0 after the stop bit.
  • CTS_CHG_INT_RAW_R
    Field CTS_CHG_INT_RAW reader - This interrupt raw bit turns to high level when receiver detects the edge change of CTSn signal.
  • CTS_CHG_INT_RAW_W
    Field CTS_CHG_INT_RAW writer - This interrupt raw bit turns to high level when receiver detects the edge change of CTSn signal.
  • DSR_CHG_INT_RAW_R
    Field DSR_CHG_INT_RAW reader - This interrupt raw bit turns to high level when receiver detects the edge change of DSRn signal.
  • DSR_CHG_INT_RAW_W
    Field DSR_CHG_INT_RAW writer - This interrupt raw bit turns to high level when receiver detects the edge change of DSRn signal.
  • FRM_ERR_INT_RAW_R
    Field FRM_ERR_INT_RAW reader - This interrupt raw bit turns to high level when receiver detects a data frame error .
  • FRM_ERR_INT_RAW_W
    Field FRM_ERR_INT_RAW writer - This interrupt raw bit turns to high level when receiver detects a data frame error .
  • GLITCH_DET_INT_RAW_R
    Field GLITCH_DET_INT_RAW reader - This interrupt raw bit turns to high level when receiver detects a glitch in the middle of a start bit.
  • GLITCH_DET_INT_RAW_W
    Field GLITCH_DET_INT_RAW writer - This interrupt raw bit turns to high level when receiver detects a glitch in the middle of a start bit.
  • PARITY_ERR_INT_RAW_R
    Field PARITY_ERR_INT_RAW reader - This interrupt raw bit turns to high level when receiver detects a parity error in the data.
  • PARITY_ERR_INT_RAW_W
    Field PARITY_ERR_INT_RAW writer - This interrupt raw bit turns to high level when receiver detects a parity error in the data.
  • R
    Register INT_RAW reader
  • RXFIFO_FULL_INT_RAW_R
    Field RXFIFO_FULL_INT_RAW reader - This interrupt raw bit turns to high level when receiver receives more data than what rxfifo_full_thrhd specifies.
  • RXFIFO_FULL_INT_RAW_W
    Field RXFIFO_FULL_INT_RAW writer - This interrupt raw bit turns to high level when receiver receives more data than what rxfifo_full_thrhd specifies.
  • RXFIFO_OVF_INT_RAW_R
    Field RXFIFO_OVF_INT_RAW reader - This interrupt raw bit turns to high level when receiver receives more data than the FIFO can store.
  • RXFIFO_OVF_INT_RAW_W
    Field RXFIFO_OVF_INT_RAW writer - This interrupt raw bit turns to high level when receiver receives more data than the FIFO can store.
  • RXFIFO_TOUT_INT_RAW_R
    Field RXFIFO_TOUT_INT_RAW reader - This interrupt raw bit turns to high level when receiver takes more time than rx_tout_thrhd to receive a byte.
  • RXFIFO_TOUT_INT_RAW_W
    Field RXFIFO_TOUT_INT_RAW writer - This interrupt raw bit turns to high level when receiver takes more time than rx_tout_thrhd to receive a byte.
  • SW_XOFF_INT_RAW_R
    Field SW_XOFF_INT_RAW reader - This interrupt raw bit turns to high level when receiver receives Xoff char when uart_sw_flow_con_en is set to 1.
  • SW_XOFF_INT_RAW_W
    Field SW_XOFF_INT_RAW writer - This interrupt raw bit turns to high level when receiver receives Xoff char when uart_sw_flow_con_en is set to 1.
  • SW_XON_INT_RAW_R
    Field SW_XON_INT_RAW reader - This interrupt raw bit turns to high level when receiver recevies Xon char when uart_sw_flow_con_en is set to 1.
  • SW_XON_INT_RAW_W
    Field SW_XON_INT_RAW writer - This interrupt raw bit turns to high level when receiver recevies Xon char when uart_sw_flow_con_en is set to 1.
  • TXFIFO_EMPTY_INT_RAW_R
    Field TXFIFO_EMPTY_INT_RAW reader - This interrupt raw bit turns to high level when the amount of data in Tx-FIFO is less than what txfifo_empty_thrhd specifies .
  • TXFIFO_EMPTY_INT_RAW_W
    Field TXFIFO_EMPTY_INT_RAW writer - This interrupt raw bit turns to high level when the amount of data in Tx-FIFO is less than what txfifo_empty_thrhd specifies .
  • TX_BRK_DONE_INT_RAW_R
    Field TX_BRK_DONE_INT_RAW reader - This interrupt raw bit turns to high level when transmitter completes sending NULL characters after all data in Tx-FIFO are sent.
  • TX_BRK_DONE_INT_RAW_W
    Field TX_BRK_DONE_INT_RAW writer - This interrupt raw bit turns to high level when transmitter completes sending NULL characters after all data in Tx-FIFO are sent.
  • TX_BRK_IDLE_DONE_INT_RAW_R
    Field TX_BRK_IDLE_DONE_INT_RAW reader - This interrupt raw bit turns to high level when transmitter has kept the shortest duration after sending the last data.
  • TX_BRK_IDLE_DONE_INT_RAW_W
    Field TX_BRK_IDLE_DONE_INT_RAW writer - This interrupt raw bit turns to high level when transmitter has kept the shortest duration after sending the last data.
  • TX_DONE_INT_RAW_R
    Field TX_DONE_INT_RAW reader - This interrupt raw bit turns to high level when transmitter has send out all data in FIFO.
  • TX_DONE_INT_RAW_W
    Field TX_DONE_INT_RAW writer - This interrupt raw bit turns to high level when transmitter has send out all data in FIFO.
  • W
    Register INT_RAW writer
  • WAKEUP_INT_RAW_R
    Field WAKEUP_INT_RAW reader - This interrupt raw bit turns to high level when input rxd edge changes more times than what reg_active_threshold specifies in light sleeping mode.
  • WAKEUP_INT_RAW_W
    Field WAKEUP_INT_RAW writer - This interrupt raw bit turns to high level when input rxd edge changes more times than what reg_active_threshold specifies in light sleeping mode.