Expand description

Configures the delay between the SDA and SCL negative edge for a start condition

Structs

  • Configures the delay between the SDA and SCL negative edge for a start condition

Type Aliases

  • Register SCL_START_HOLD reader
  • Field TIME reader - This register is used to configure the time between the negative edge of SDA and the negative edge of SCL for a START condition, in I2C module clock cycles.
  • Field TIME writer - This register is used to configure the time between the negative edge of SDA and the negative edge of SCL for a START condition, in I2C module clock cycles.
  • Register SCL_START_HOLD writer