Module lp_core

Source
Expand description

§Control the LP core

§Overview

The LP_CORE driver provides an interface for controlling and managing the low power core of ESP chips, allowing efficient low power operation and wakeup from sleep based on configurable sources. The low power core is responsible for executing low power tasks while the high power core is in sleep mode.

The LpCore struct provides methods to stop and run the low power core.

The stop method stops the low power core, putting it into a sleep state.

The run method starts the low power core and specifies the wakeup source.

§Example

const CODE: &[u8] = &[
    0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00,
    0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00,
    0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13,
    0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00,
    0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00,
    0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00,
    0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13,
    0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00,
    0x13, 0x00, 0x00, 0x00, 0x13, 0x00, 0x00, 0x00, 0x17, 0x05, 0x00, 0x00, 0x13, 0x05, 0x05,
    0x04, 0x85, 0x45, 0x23, 0x00, 0xb5, 0x00, 0xb7, 0x26, 0x0b, 0x60, 0xa1, 0x06, 0x37, 0x26,
    0x0b, 0x60, 0x11, 0x06, 0x09, 0x47, 0x18, 0xc2, 0xb7, 0x47, 0x0f, 0x00, 0x93, 0x87, 0x07,
    0x24, 0xfd, 0x17, 0xfd, 0xff, 0x85, 0x05, 0x23, 0x00, 0xb5, 0x00, 0x98, 0xc2, 0xb7, 0x47,
    0x0f, 0x00, 0x93, 0x87, 0x07, 0x24, 0xfd, 0x17, 0xfd, 0xff, 0xf9, 0xbf, 0x00, 0x00, 0x00,
    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
];

// configure GPIO 1 as LP output pin
let mut lp_pin = io.pins.gpio1.into_low_power();
lp_pin.output_enable(true);

let mut lp_core = esp32c6_hal::lp_core::LpCore::new(peripherals.LP_CORE);
lp_core.stop();
println!("lp core stopped");

// copy code to LP ram
let lp_ram = 0x5000_0000 as *mut u8;
unsafe {
    core::ptr::copy_nonoverlapping(CODE as *const _ as *const u8, lp_ram, CODE.len());
}
println!("copied code (len {})", CODE.len());

// start LP core
lp_core.run(lp_core::LpCoreWakeupSource::HpCpu);
println!("lpcore run");

let data = (0x500000c0) as *mut u32;
loop {
    print!("Current {:x}           \u{000d}", unsafe {
        data.read_volatile()
    });
}

Structs§

LpCore

Enums§

LpCoreClockSource
Clock sources for the LP core
LpCoreWakeupSource