Module esp32c6_hal::gpio::lp_gpio

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Expand description

Low Power IO (LP_IO)

Overview

The hardware provides a couple of GPIO pins with low power (LP) capabilities and analog functions. These pins can be controlled by either IO MUX or LP IO MUX.

If controlled by LP IO MUX, these pins will bypass IO MUX and GPIO matrix for the use by ULP and peripherals in LP system.

When configured as LP GPIOs, the pins can still be controlled by ULP or the peripherals in LP system during chip Deep-sleep, and wake up the chip from Deep-sleep.

Example

let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
// configure GPIO 1 as LP output pin
let lp_pin = io.pins.gpio1.into_low_power().into_push_pull_output();

Structs

  • LowPowerPin
    A GPIO pin configured for low power operation

Traits