esp32c3/
extmem.rs

1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    icache_ctrl: ICACHE_CTRL,
6    icache_ctrl1: ICACHE_CTRL1,
7    icache_tag_power_ctrl: ICACHE_TAG_POWER_CTRL,
8    icache_prelock_ctrl: ICACHE_PRELOCK_CTRL,
9    icache_prelock_sct0_addr: ICACHE_PRELOCK_SCT0_ADDR,
10    icache_prelock_sct1_addr: ICACHE_PRELOCK_SCT1_ADDR,
11    icache_prelock_sct_size: ICACHE_PRELOCK_SCT_SIZE,
12    icache_lock_ctrl: ICACHE_LOCK_CTRL,
13    icache_lock_addr: ICACHE_LOCK_ADDR,
14    icache_lock_size: ICACHE_LOCK_SIZE,
15    icache_sync_ctrl: ICACHE_SYNC_CTRL,
16    icache_sync_addr: ICACHE_SYNC_ADDR,
17    icache_sync_size: ICACHE_SYNC_SIZE,
18    icache_preload_ctrl: ICACHE_PRELOAD_CTRL,
19    icache_preload_addr: ICACHE_PRELOAD_ADDR,
20    icache_preload_size: ICACHE_PRELOAD_SIZE,
21    icache_autoload_ctrl: ICACHE_AUTOLOAD_CTRL,
22    icache_autoload_sct0_addr: ICACHE_AUTOLOAD_SCT0_ADDR,
23    icache_autoload_sct0_size: ICACHE_AUTOLOAD_SCT0_SIZE,
24    icache_autoload_sct1_addr: ICACHE_AUTOLOAD_SCT1_ADDR,
25    icache_autoload_sct1_size: ICACHE_AUTOLOAD_SCT1_SIZE,
26    ibus_to_flash_start_vaddr: IBUS_TO_FLASH_START_VADDR,
27    ibus_to_flash_end_vaddr: IBUS_TO_FLASH_END_VADDR,
28    dbus_to_flash_start_vaddr: DBUS_TO_FLASH_START_VADDR,
29    dbus_to_flash_end_vaddr: DBUS_TO_FLASH_END_VADDR,
30    cache_acs_cnt_clr: CACHE_ACS_CNT_CLR,
31    ibus_acs_miss_cnt: IBUS_ACS_MISS_CNT,
32    ibus_acs_cnt: IBUS_ACS_CNT,
33    dbus_acs_flash_miss_cnt: DBUS_ACS_FLASH_MISS_CNT,
34    dbus_acs_cnt: DBUS_ACS_CNT,
35    cache_ilg_int_ena: CACHE_ILG_INT_ENA,
36    cache_ilg_int_clr: CACHE_ILG_INT_CLR,
37    cache_ilg_int_st: CACHE_ILG_INT_ST,
38    core0_acs_cache_int_ena: CORE0_ACS_CACHE_INT_ENA,
39    core0_acs_cache_int_clr: CORE0_ACS_CACHE_INT_CLR,
40    core0_acs_cache_int_st: CORE0_ACS_CACHE_INT_ST,
41    core0_dbus_reject_st: CORE0_DBUS_REJECT_ST,
42    core0_dbus_reject_vaddr: CORE0_DBUS_REJECT_VADDR,
43    core0_ibus_reject_st: CORE0_IBUS_REJECT_ST,
44    core0_ibus_reject_vaddr: CORE0_IBUS_REJECT_VADDR,
45    cache_mmu_fault_content: CACHE_MMU_FAULT_CONTENT,
46    cache_mmu_fault_vaddr: CACHE_MMU_FAULT_VADDR,
47    cache_wrap_around_ctrl: CACHE_WRAP_AROUND_CTRL,
48    cache_mmu_power_ctrl: CACHE_MMU_POWER_CTRL,
49    cache_state: CACHE_STATE,
50    cache_encrypt_decrypt_record_disable: CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE,
51    cache_encrypt_decrypt_clk_force_on: CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON,
52    cache_preload_int_ctrl: CACHE_PRELOAD_INT_CTRL,
53    cache_sync_int_ctrl: CACHE_SYNC_INT_CTRL,
54    cache_mmu_owner: CACHE_MMU_OWNER,
55    cache_conf_misc: CACHE_CONF_MISC,
56    icache_freeze: ICACHE_FREEZE,
57    icache_atomic_operate_ena: ICACHE_ATOMIC_OPERATE_ENA,
58    cache_request: CACHE_REQUEST,
59    ibus_pms_tbl_lock: IBUS_PMS_TBL_LOCK,
60    ibus_pms_tbl_boundary0: IBUS_PMS_TBL_BOUNDARY0,
61    ibus_pms_tbl_boundary1: IBUS_PMS_TBL_BOUNDARY1,
62    ibus_pms_tbl_boundary2: IBUS_PMS_TBL_BOUNDARY2,
63    ibus_pms_tbl_attr: IBUS_PMS_TBL_ATTR,
64    dbus_pms_tbl_lock: DBUS_PMS_TBL_LOCK,
65    dbus_pms_tbl_boundary0: DBUS_PMS_TBL_BOUNDARY0,
66    dbus_pms_tbl_boundary1: DBUS_PMS_TBL_BOUNDARY1,
67    dbus_pms_tbl_boundary2: DBUS_PMS_TBL_BOUNDARY2,
68    dbus_pms_tbl_attr: DBUS_PMS_TBL_ATTR,
69    clock_gate: CLOCK_GATE,
70    _reserved65: [u8; 0x02f8],
71    reg_date: REG_DATE,
72}
73impl RegisterBlock {
74    #[doc = "0x00 - This description will be updated in the near future."]
75    #[inline(always)]
76    pub const fn icache_ctrl(&self) -> &ICACHE_CTRL {
77        &self.icache_ctrl
78    }
79    #[doc = "0x04 - This description will be updated in the near future."]
80    #[inline(always)]
81    pub const fn icache_ctrl1(&self) -> &ICACHE_CTRL1 {
82        &self.icache_ctrl1
83    }
84    #[doc = "0x08 - This description will be updated in the near future."]
85    #[inline(always)]
86    pub const fn icache_tag_power_ctrl(&self) -> &ICACHE_TAG_POWER_CTRL {
87        &self.icache_tag_power_ctrl
88    }
89    #[doc = "0x0c - This description will be updated in the near future."]
90    #[inline(always)]
91    pub const fn icache_prelock_ctrl(&self) -> &ICACHE_PRELOCK_CTRL {
92        &self.icache_prelock_ctrl
93    }
94    #[doc = "0x10 - This description will be updated in the near future."]
95    #[inline(always)]
96    pub const fn icache_prelock_sct0_addr(&self) -> &ICACHE_PRELOCK_SCT0_ADDR {
97        &self.icache_prelock_sct0_addr
98    }
99    #[doc = "0x14 - This description will be updated in the near future."]
100    #[inline(always)]
101    pub const fn icache_prelock_sct1_addr(&self) -> &ICACHE_PRELOCK_SCT1_ADDR {
102        &self.icache_prelock_sct1_addr
103    }
104    #[doc = "0x18 - This description will be updated in the near future."]
105    #[inline(always)]
106    pub const fn icache_prelock_sct_size(&self) -> &ICACHE_PRELOCK_SCT_SIZE {
107        &self.icache_prelock_sct_size
108    }
109    #[doc = "0x1c - This description will be updated in the near future."]
110    #[inline(always)]
111    pub const fn icache_lock_ctrl(&self) -> &ICACHE_LOCK_CTRL {
112        &self.icache_lock_ctrl
113    }
114    #[doc = "0x20 - This description will be updated in the near future."]
115    #[inline(always)]
116    pub const fn icache_lock_addr(&self) -> &ICACHE_LOCK_ADDR {
117        &self.icache_lock_addr
118    }
119    #[doc = "0x24 - This description will be updated in the near future."]
120    #[inline(always)]
121    pub const fn icache_lock_size(&self) -> &ICACHE_LOCK_SIZE {
122        &self.icache_lock_size
123    }
124    #[doc = "0x28 - This description will be updated in the near future."]
125    #[inline(always)]
126    pub const fn icache_sync_ctrl(&self) -> &ICACHE_SYNC_CTRL {
127        &self.icache_sync_ctrl
128    }
129    #[doc = "0x2c - This description will be updated in the near future."]
130    #[inline(always)]
131    pub const fn icache_sync_addr(&self) -> &ICACHE_SYNC_ADDR {
132        &self.icache_sync_addr
133    }
134    #[doc = "0x30 - This description will be updated in the near future."]
135    #[inline(always)]
136    pub const fn icache_sync_size(&self) -> &ICACHE_SYNC_SIZE {
137        &self.icache_sync_size
138    }
139    #[doc = "0x34 - This description will be updated in the near future."]
140    #[inline(always)]
141    pub const fn icache_preload_ctrl(&self) -> &ICACHE_PRELOAD_CTRL {
142        &self.icache_preload_ctrl
143    }
144    #[doc = "0x38 - This description will be updated in the near future."]
145    #[inline(always)]
146    pub const fn icache_preload_addr(&self) -> &ICACHE_PRELOAD_ADDR {
147        &self.icache_preload_addr
148    }
149    #[doc = "0x3c - This description will be updated in the near future."]
150    #[inline(always)]
151    pub const fn icache_preload_size(&self) -> &ICACHE_PRELOAD_SIZE {
152        &self.icache_preload_size
153    }
154    #[doc = "0x40 - This description will be updated in the near future."]
155    #[inline(always)]
156    pub const fn icache_autoload_ctrl(&self) -> &ICACHE_AUTOLOAD_CTRL {
157        &self.icache_autoload_ctrl
158    }
159    #[doc = "0x44 - This description will be updated in the near future."]
160    #[inline(always)]
161    pub const fn icache_autoload_sct0_addr(&self) -> &ICACHE_AUTOLOAD_SCT0_ADDR {
162        &self.icache_autoload_sct0_addr
163    }
164    #[doc = "0x48 - This description will be updated in the near future."]
165    #[inline(always)]
166    pub const fn icache_autoload_sct0_size(&self) -> &ICACHE_AUTOLOAD_SCT0_SIZE {
167        &self.icache_autoload_sct0_size
168    }
169    #[doc = "0x4c - This description will be updated in the near future."]
170    #[inline(always)]
171    pub const fn icache_autoload_sct1_addr(&self) -> &ICACHE_AUTOLOAD_SCT1_ADDR {
172        &self.icache_autoload_sct1_addr
173    }
174    #[doc = "0x50 - This description will be updated in the near future."]
175    #[inline(always)]
176    pub const fn icache_autoload_sct1_size(&self) -> &ICACHE_AUTOLOAD_SCT1_SIZE {
177        &self.icache_autoload_sct1_size
178    }
179    #[doc = "0x54 - This description will be updated in the near future."]
180    #[inline(always)]
181    pub const fn ibus_to_flash_start_vaddr(&self) -> &IBUS_TO_FLASH_START_VADDR {
182        &self.ibus_to_flash_start_vaddr
183    }
184    #[doc = "0x58 - This description will be updated in the near future."]
185    #[inline(always)]
186    pub const fn ibus_to_flash_end_vaddr(&self) -> &IBUS_TO_FLASH_END_VADDR {
187        &self.ibus_to_flash_end_vaddr
188    }
189    #[doc = "0x5c - This description will be updated in the near future."]
190    #[inline(always)]
191    pub const fn dbus_to_flash_start_vaddr(&self) -> &DBUS_TO_FLASH_START_VADDR {
192        &self.dbus_to_flash_start_vaddr
193    }
194    #[doc = "0x60 - This description will be updated in the near future."]
195    #[inline(always)]
196    pub const fn dbus_to_flash_end_vaddr(&self) -> &DBUS_TO_FLASH_END_VADDR {
197        &self.dbus_to_flash_end_vaddr
198    }
199    #[doc = "0x64 - This description will be updated in the near future."]
200    #[inline(always)]
201    pub const fn cache_acs_cnt_clr(&self) -> &CACHE_ACS_CNT_CLR {
202        &self.cache_acs_cnt_clr
203    }
204    #[doc = "0x68 - This description will be updated in the near future."]
205    #[inline(always)]
206    pub const fn ibus_acs_miss_cnt(&self) -> &IBUS_ACS_MISS_CNT {
207        &self.ibus_acs_miss_cnt
208    }
209    #[doc = "0x6c - This description will be updated in the near future."]
210    #[inline(always)]
211    pub const fn ibus_acs_cnt(&self) -> &IBUS_ACS_CNT {
212        &self.ibus_acs_cnt
213    }
214    #[doc = "0x70 - This description will be updated in the near future."]
215    #[inline(always)]
216    pub const fn dbus_acs_flash_miss_cnt(&self) -> &DBUS_ACS_FLASH_MISS_CNT {
217        &self.dbus_acs_flash_miss_cnt
218    }
219    #[doc = "0x74 - This description will be updated in the near future."]
220    #[inline(always)]
221    pub const fn dbus_acs_cnt(&self) -> &DBUS_ACS_CNT {
222        &self.dbus_acs_cnt
223    }
224    #[doc = "0x78 - This description will be updated in the near future."]
225    #[inline(always)]
226    pub const fn cache_ilg_int_ena(&self) -> &CACHE_ILG_INT_ENA {
227        &self.cache_ilg_int_ena
228    }
229    #[doc = "0x7c - This description will be updated in the near future."]
230    #[inline(always)]
231    pub const fn cache_ilg_int_clr(&self) -> &CACHE_ILG_INT_CLR {
232        &self.cache_ilg_int_clr
233    }
234    #[doc = "0x80 - This description will be updated in the near future."]
235    #[inline(always)]
236    pub const fn cache_ilg_int_st(&self) -> &CACHE_ILG_INT_ST {
237        &self.cache_ilg_int_st
238    }
239    #[doc = "0x84 - This description will be updated in the near future."]
240    #[inline(always)]
241    pub const fn core0_acs_cache_int_ena(&self) -> &CORE0_ACS_CACHE_INT_ENA {
242        &self.core0_acs_cache_int_ena
243    }
244    #[doc = "0x88 - This description will be updated in the near future."]
245    #[inline(always)]
246    pub const fn core0_acs_cache_int_clr(&self) -> &CORE0_ACS_CACHE_INT_CLR {
247        &self.core0_acs_cache_int_clr
248    }
249    #[doc = "0x8c - This description will be updated in the near future."]
250    #[inline(always)]
251    pub const fn core0_acs_cache_int_st(&self) -> &CORE0_ACS_CACHE_INT_ST {
252        &self.core0_acs_cache_int_st
253    }
254    #[doc = "0x90 - This description will be updated in the near future."]
255    #[inline(always)]
256    pub const fn core0_dbus_reject_st(&self) -> &CORE0_DBUS_REJECT_ST {
257        &self.core0_dbus_reject_st
258    }
259    #[doc = "0x94 - This description will be updated in the near future."]
260    #[inline(always)]
261    pub const fn core0_dbus_reject_vaddr(&self) -> &CORE0_DBUS_REJECT_VADDR {
262        &self.core0_dbus_reject_vaddr
263    }
264    #[doc = "0x98 - This description will be updated in the near future."]
265    #[inline(always)]
266    pub const fn core0_ibus_reject_st(&self) -> &CORE0_IBUS_REJECT_ST {
267        &self.core0_ibus_reject_st
268    }
269    #[doc = "0x9c - This description will be updated in the near future."]
270    #[inline(always)]
271    pub const fn core0_ibus_reject_vaddr(&self) -> &CORE0_IBUS_REJECT_VADDR {
272        &self.core0_ibus_reject_vaddr
273    }
274    #[doc = "0xa0 - This description will be updated in the near future."]
275    #[inline(always)]
276    pub const fn cache_mmu_fault_content(&self) -> &CACHE_MMU_FAULT_CONTENT {
277        &self.cache_mmu_fault_content
278    }
279    #[doc = "0xa4 - This description will be updated in the near future."]
280    #[inline(always)]
281    pub const fn cache_mmu_fault_vaddr(&self) -> &CACHE_MMU_FAULT_VADDR {
282        &self.cache_mmu_fault_vaddr
283    }
284    #[doc = "0xa8 - This description will be updated in the near future."]
285    #[inline(always)]
286    pub const fn cache_wrap_around_ctrl(&self) -> &CACHE_WRAP_AROUND_CTRL {
287        &self.cache_wrap_around_ctrl
288    }
289    #[doc = "0xac - This description will be updated in the near future."]
290    #[inline(always)]
291    pub const fn cache_mmu_power_ctrl(&self) -> &CACHE_MMU_POWER_CTRL {
292        &self.cache_mmu_power_ctrl
293    }
294    #[doc = "0xb0 - This description will be updated in the near future."]
295    #[inline(always)]
296    pub const fn cache_state(&self) -> &CACHE_STATE {
297        &self.cache_state
298    }
299    #[doc = "0xb4 - This description will be updated in the near future."]
300    #[inline(always)]
301    pub const fn cache_encrypt_decrypt_record_disable(
302        &self,
303    ) -> &CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE {
304        &self.cache_encrypt_decrypt_record_disable
305    }
306    #[doc = "0xb8 - This description will be updated in the near future."]
307    #[inline(always)]
308    pub const fn cache_encrypt_decrypt_clk_force_on(&self) -> &CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON {
309        &self.cache_encrypt_decrypt_clk_force_on
310    }
311    #[doc = "0xbc - This description will be updated in the near future."]
312    #[inline(always)]
313    pub const fn cache_preload_int_ctrl(&self) -> &CACHE_PRELOAD_INT_CTRL {
314        &self.cache_preload_int_ctrl
315    }
316    #[doc = "0xc0 - This description will be updated in the near future."]
317    #[inline(always)]
318    pub const fn cache_sync_int_ctrl(&self) -> &CACHE_SYNC_INT_CTRL {
319        &self.cache_sync_int_ctrl
320    }
321    #[doc = "0xc4 - This description will be updated in the near future."]
322    #[inline(always)]
323    pub const fn cache_mmu_owner(&self) -> &CACHE_MMU_OWNER {
324        &self.cache_mmu_owner
325    }
326    #[doc = "0xc8 - This description will be updated in the near future."]
327    #[inline(always)]
328    pub const fn cache_conf_misc(&self) -> &CACHE_CONF_MISC {
329        &self.cache_conf_misc
330    }
331    #[doc = "0xcc - This description will be updated in the near future."]
332    #[inline(always)]
333    pub const fn icache_freeze(&self) -> &ICACHE_FREEZE {
334        &self.icache_freeze
335    }
336    #[doc = "0xd0 - This description will be updated in the near future."]
337    #[inline(always)]
338    pub const fn icache_atomic_operate_ena(&self) -> &ICACHE_ATOMIC_OPERATE_ENA {
339        &self.icache_atomic_operate_ena
340    }
341    #[doc = "0xd4 - This description will be updated in the near future."]
342    #[inline(always)]
343    pub const fn cache_request(&self) -> &CACHE_REQUEST {
344        &self.cache_request
345    }
346    #[doc = "0xd8 - This description will be updated in the near future."]
347    #[inline(always)]
348    pub const fn ibus_pms_tbl_lock(&self) -> &IBUS_PMS_TBL_LOCK {
349        &self.ibus_pms_tbl_lock
350    }
351    #[doc = "0xdc - This description will be updated in the near future."]
352    #[inline(always)]
353    pub const fn ibus_pms_tbl_boundary0(&self) -> &IBUS_PMS_TBL_BOUNDARY0 {
354        &self.ibus_pms_tbl_boundary0
355    }
356    #[doc = "0xe0 - This description will be updated in the near future."]
357    #[inline(always)]
358    pub const fn ibus_pms_tbl_boundary1(&self) -> &IBUS_PMS_TBL_BOUNDARY1 {
359        &self.ibus_pms_tbl_boundary1
360    }
361    #[doc = "0xe4 - This description will be updated in the near future."]
362    #[inline(always)]
363    pub const fn ibus_pms_tbl_boundary2(&self) -> &IBUS_PMS_TBL_BOUNDARY2 {
364        &self.ibus_pms_tbl_boundary2
365    }
366    #[doc = "0xe8 - This description will be updated in the near future."]
367    #[inline(always)]
368    pub const fn ibus_pms_tbl_attr(&self) -> &IBUS_PMS_TBL_ATTR {
369        &self.ibus_pms_tbl_attr
370    }
371    #[doc = "0xec - This description will be updated in the near future."]
372    #[inline(always)]
373    pub const fn dbus_pms_tbl_lock(&self) -> &DBUS_PMS_TBL_LOCK {
374        &self.dbus_pms_tbl_lock
375    }
376    #[doc = "0xf0 - This description will be updated in the near future."]
377    #[inline(always)]
378    pub const fn dbus_pms_tbl_boundary0(&self) -> &DBUS_PMS_TBL_BOUNDARY0 {
379        &self.dbus_pms_tbl_boundary0
380    }
381    #[doc = "0xf4 - This description will be updated in the near future."]
382    #[inline(always)]
383    pub const fn dbus_pms_tbl_boundary1(&self) -> &DBUS_PMS_TBL_BOUNDARY1 {
384        &self.dbus_pms_tbl_boundary1
385    }
386    #[doc = "0xf8 - This description will be updated in the near future."]
387    #[inline(always)]
388    pub const fn dbus_pms_tbl_boundary2(&self) -> &DBUS_PMS_TBL_BOUNDARY2 {
389        &self.dbus_pms_tbl_boundary2
390    }
391    #[doc = "0xfc - This description will be updated in the near future."]
392    #[inline(always)]
393    pub const fn dbus_pms_tbl_attr(&self) -> &DBUS_PMS_TBL_ATTR {
394        &self.dbus_pms_tbl_attr
395    }
396    #[doc = "0x100 - This description will be updated in the near future."]
397    #[inline(always)]
398    pub const fn clock_gate(&self) -> &CLOCK_GATE {
399        &self.clock_gate
400    }
401    #[doc = "0x3fc - This description will be updated in the near future."]
402    #[inline(always)]
403    pub const fn reg_date(&self) -> &REG_DATE {
404        &self.reg_date
405    }
406}
407#[doc = "ICACHE_CTRL (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_ctrl`] module"]
408pub type ICACHE_CTRL = crate::Reg<icache_ctrl::ICACHE_CTRL_SPEC>;
409#[doc = "This description will be updated in the near future."]
410pub mod icache_ctrl;
411#[doc = "ICACHE_CTRL1 (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_ctrl1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_ctrl1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_ctrl1`] module"]
412pub type ICACHE_CTRL1 = crate::Reg<icache_ctrl1::ICACHE_CTRL1_SPEC>;
413#[doc = "This description will be updated in the near future."]
414pub mod icache_ctrl1;
415#[doc = "ICACHE_TAG_POWER_CTRL (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_tag_power_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_tag_power_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_tag_power_ctrl`] module"]
416pub type ICACHE_TAG_POWER_CTRL = crate::Reg<icache_tag_power_ctrl::ICACHE_TAG_POWER_CTRL_SPEC>;
417#[doc = "This description will be updated in the near future."]
418pub mod icache_tag_power_ctrl;
419#[doc = "ICACHE_PRELOCK_CTRL (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_prelock_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_prelock_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_prelock_ctrl`] module"]
420pub type ICACHE_PRELOCK_CTRL = crate::Reg<icache_prelock_ctrl::ICACHE_PRELOCK_CTRL_SPEC>;
421#[doc = "This description will be updated in the near future."]
422pub mod icache_prelock_ctrl;
423#[doc = "ICACHE_PRELOCK_SCT0_ADDR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_prelock_sct0_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_prelock_sct0_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_prelock_sct0_addr`] module"]
424pub type ICACHE_PRELOCK_SCT0_ADDR =
425    crate::Reg<icache_prelock_sct0_addr::ICACHE_PRELOCK_SCT0_ADDR_SPEC>;
426#[doc = "This description will be updated in the near future."]
427pub mod icache_prelock_sct0_addr;
428#[doc = "ICACHE_PRELOCK_SCT1_ADDR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_prelock_sct1_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_prelock_sct1_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_prelock_sct1_addr`] module"]
429pub type ICACHE_PRELOCK_SCT1_ADDR =
430    crate::Reg<icache_prelock_sct1_addr::ICACHE_PRELOCK_SCT1_ADDR_SPEC>;
431#[doc = "This description will be updated in the near future."]
432pub mod icache_prelock_sct1_addr;
433#[doc = "ICACHE_PRELOCK_SCT_SIZE (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_prelock_sct_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_prelock_sct_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_prelock_sct_size`] module"]
434pub type ICACHE_PRELOCK_SCT_SIZE =
435    crate::Reg<icache_prelock_sct_size::ICACHE_PRELOCK_SCT_SIZE_SPEC>;
436#[doc = "This description will be updated in the near future."]
437pub mod icache_prelock_sct_size;
438#[doc = "ICACHE_LOCK_CTRL (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_lock_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_lock_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_lock_ctrl`] module"]
439pub type ICACHE_LOCK_CTRL = crate::Reg<icache_lock_ctrl::ICACHE_LOCK_CTRL_SPEC>;
440#[doc = "This description will be updated in the near future."]
441pub mod icache_lock_ctrl;
442#[doc = "ICACHE_LOCK_ADDR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_lock_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_lock_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_lock_addr`] module"]
443pub type ICACHE_LOCK_ADDR = crate::Reg<icache_lock_addr::ICACHE_LOCK_ADDR_SPEC>;
444#[doc = "This description will be updated in the near future."]
445pub mod icache_lock_addr;
446#[doc = "ICACHE_LOCK_SIZE (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_lock_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_lock_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_lock_size`] module"]
447pub type ICACHE_LOCK_SIZE = crate::Reg<icache_lock_size::ICACHE_LOCK_SIZE_SPEC>;
448#[doc = "This description will be updated in the near future."]
449pub mod icache_lock_size;
450#[doc = "ICACHE_SYNC_CTRL (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_sync_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_sync_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_sync_ctrl`] module"]
451pub type ICACHE_SYNC_CTRL = crate::Reg<icache_sync_ctrl::ICACHE_SYNC_CTRL_SPEC>;
452#[doc = "This description will be updated in the near future."]
453pub mod icache_sync_ctrl;
454#[doc = "ICACHE_SYNC_ADDR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_sync_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_sync_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_sync_addr`] module"]
455pub type ICACHE_SYNC_ADDR = crate::Reg<icache_sync_addr::ICACHE_SYNC_ADDR_SPEC>;
456#[doc = "This description will be updated in the near future."]
457pub mod icache_sync_addr;
458#[doc = "ICACHE_SYNC_SIZE (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_sync_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_sync_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_sync_size`] module"]
459pub type ICACHE_SYNC_SIZE = crate::Reg<icache_sync_size::ICACHE_SYNC_SIZE_SPEC>;
460#[doc = "This description will be updated in the near future."]
461pub mod icache_sync_size;
462#[doc = "ICACHE_PRELOAD_CTRL (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_preload_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_preload_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_preload_ctrl`] module"]
463pub type ICACHE_PRELOAD_CTRL = crate::Reg<icache_preload_ctrl::ICACHE_PRELOAD_CTRL_SPEC>;
464#[doc = "This description will be updated in the near future."]
465pub mod icache_preload_ctrl;
466#[doc = "ICACHE_PRELOAD_ADDR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_preload_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_preload_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_preload_addr`] module"]
467pub type ICACHE_PRELOAD_ADDR = crate::Reg<icache_preload_addr::ICACHE_PRELOAD_ADDR_SPEC>;
468#[doc = "This description will be updated in the near future."]
469pub mod icache_preload_addr;
470#[doc = "ICACHE_PRELOAD_SIZE (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_preload_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_preload_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_preload_size`] module"]
471pub type ICACHE_PRELOAD_SIZE = crate::Reg<icache_preload_size::ICACHE_PRELOAD_SIZE_SPEC>;
472#[doc = "This description will be updated in the near future."]
473pub mod icache_preload_size;
474#[doc = "ICACHE_AUTOLOAD_CTRL (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_autoload_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_autoload_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_autoload_ctrl`] module"]
475pub type ICACHE_AUTOLOAD_CTRL = crate::Reg<icache_autoload_ctrl::ICACHE_AUTOLOAD_CTRL_SPEC>;
476#[doc = "This description will be updated in the near future."]
477pub mod icache_autoload_ctrl;
478#[doc = "ICACHE_AUTOLOAD_SCT0_ADDR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_autoload_sct0_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_autoload_sct0_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_autoload_sct0_addr`] module"]
479pub type ICACHE_AUTOLOAD_SCT0_ADDR =
480    crate::Reg<icache_autoload_sct0_addr::ICACHE_AUTOLOAD_SCT0_ADDR_SPEC>;
481#[doc = "This description will be updated in the near future."]
482pub mod icache_autoload_sct0_addr;
483#[doc = "ICACHE_AUTOLOAD_SCT0_SIZE (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_autoload_sct0_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_autoload_sct0_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_autoload_sct0_size`] module"]
484pub type ICACHE_AUTOLOAD_SCT0_SIZE =
485    crate::Reg<icache_autoload_sct0_size::ICACHE_AUTOLOAD_SCT0_SIZE_SPEC>;
486#[doc = "This description will be updated in the near future."]
487pub mod icache_autoload_sct0_size;
488#[doc = "ICACHE_AUTOLOAD_SCT1_ADDR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_autoload_sct1_addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_autoload_sct1_addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_autoload_sct1_addr`] module"]
489pub type ICACHE_AUTOLOAD_SCT1_ADDR =
490    crate::Reg<icache_autoload_sct1_addr::ICACHE_AUTOLOAD_SCT1_ADDR_SPEC>;
491#[doc = "This description will be updated in the near future."]
492pub mod icache_autoload_sct1_addr;
493#[doc = "ICACHE_AUTOLOAD_SCT1_SIZE (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_autoload_sct1_size::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_autoload_sct1_size::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_autoload_sct1_size`] module"]
494pub type ICACHE_AUTOLOAD_SCT1_SIZE =
495    crate::Reg<icache_autoload_sct1_size::ICACHE_AUTOLOAD_SCT1_SIZE_SPEC>;
496#[doc = "This description will be updated in the near future."]
497pub mod icache_autoload_sct1_size;
498#[doc = "IBUS_TO_FLASH_START_VADDR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`ibus_to_flash_start_vaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ibus_to_flash_start_vaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibus_to_flash_start_vaddr`] module"]
499pub type IBUS_TO_FLASH_START_VADDR =
500    crate::Reg<ibus_to_flash_start_vaddr::IBUS_TO_FLASH_START_VADDR_SPEC>;
501#[doc = "This description will be updated in the near future."]
502pub mod ibus_to_flash_start_vaddr;
503#[doc = "IBUS_TO_FLASH_END_VADDR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`ibus_to_flash_end_vaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ibus_to_flash_end_vaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibus_to_flash_end_vaddr`] module"]
504pub type IBUS_TO_FLASH_END_VADDR =
505    crate::Reg<ibus_to_flash_end_vaddr::IBUS_TO_FLASH_END_VADDR_SPEC>;
506#[doc = "This description will be updated in the near future."]
507pub mod ibus_to_flash_end_vaddr;
508#[doc = "DBUS_TO_FLASH_START_VADDR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`dbus_to_flash_start_vaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbus_to_flash_start_vaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbus_to_flash_start_vaddr`] module"]
509pub type DBUS_TO_FLASH_START_VADDR =
510    crate::Reg<dbus_to_flash_start_vaddr::DBUS_TO_FLASH_START_VADDR_SPEC>;
511#[doc = "This description will be updated in the near future."]
512pub mod dbus_to_flash_start_vaddr;
513#[doc = "DBUS_TO_FLASH_END_VADDR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`dbus_to_flash_end_vaddr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbus_to_flash_end_vaddr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbus_to_flash_end_vaddr`] module"]
514pub type DBUS_TO_FLASH_END_VADDR =
515    crate::Reg<dbus_to_flash_end_vaddr::DBUS_TO_FLASH_END_VADDR_SPEC>;
516#[doc = "This description will be updated in the near future."]
517pub mod dbus_to_flash_end_vaddr;
518#[doc = "CACHE_ACS_CNT_CLR (w) register accessor: This description will be updated in the near future.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_acs_cnt_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_acs_cnt_clr`] module"]
519pub type CACHE_ACS_CNT_CLR = crate::Reg<cache_acs_cnt_clr::CACHE_ACS_CNT_CLR_SPEC>;
520#[doc = "This description will be updated in the near future."]
521pub mod cache_acs_cnt_clr;
522#[doc = "IBUS_ACS_MISS_CNT (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`ibus_acs_miss_cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibus_acs_miss_cnt`] module"]
523pub type IBUS_ACS_MISS_CNT = crate::Reg<ibus_acs_miss_cnt::IBUS_ACS_MISS_CNT_SPEC>;
524#[doc = "This description will be updated in the near future."]
525pub mod ibus_acs_miss_cnt;
526#[doc = "IBUS_ACS_CNT (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`ibus_acs_cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibus_acs_cnt`] module"]
527pub type IBUS_ACS_CNT = crate::Reg<ibus_acs_cnt::IBUS_ACS_CNT_SPEC>;
528#[doc = "This description will be updated in the near future."]
529pub mod ibus_acs_cnt;
530#[doc = "DBUS_ACS_FLASH_MISS_CNT (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`dbus_acs_flash_miss_cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbus_acs_flash_miss_cnt`] module"]
531pub type DBUS_ACS_FLASH_MISS_CNT =
532    crate::Reg<dbus_acs_flash_miss_cnt::DBUS_ACS_FLASH_MISS_CNT_SPEC>;
533#[doc = "This description will be updated in the near future."]
534pub mod dbus_acs_flash_miss_cnt;
535#[doc = "DBUS_ACS_CNT (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`dbus_acs_cnt::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbus_acs_cnt`] module"]
536pub type DBUS_ACS_CNT = crate::Reg<dbus_acs_cnt::DBUS_ACS_CNT_SPEC>;
537#[doc = "This description will be updated in the near future."]
538pub mod dbus_acs_cnt;
539#[doc = "CACHE_ILG_INT_ENA (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_ilg_int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_ilg_int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_ilg_int_ena`] module"]
540pub type CACHE_ILG_INT_ENA = crate::Reg<cache_ilg_int_ena::CACHE_ILG_INT_ENA_SPEC>;
541#[doc = "This description will be updated in the near future."]
542pub mod cache_ilg_int_ena;
543#[doc = "CACHE_ILG_INT_CLR (w) register accessor: This description will be updated in the near future.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_ilg_int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_ilg_int_clr`] module"]
544pub type CACHE_ILG_INT_CLR = crate::Reg<cache_ilg_int_clr::CACHE_ILG_INT_CLR_SPEC>;
545#[doc = "This description will be updated in the near future."]
546pub mod cache_ilg_int_clr;
547#[doc = "CACHE_ILG_INT_ST (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_ilg_int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_ilg_int_st`] module"]
548pub type CACHE_ILG_INT_ST = crate::Reg<cache_ilg_int_st::CACHE_ILG_INT_ST_SPEC>;
549#[doc = "This description will be updated in the near future."]
550pub mod cache_ilg_int_st;
551#[doc = "CORE0_ACS_CACHE_INT_ENA (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`core0_acs_cache_int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core0_acs_cache_int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core0_acs_cache_int_ena`] module"]
552pub type CORE0_ACS_CACHE_INT_ENA =
553    crate::Reg<core0_acs_cache_int_ena::CORE0_ACS_CACHE_INT_ENA_SPEC>;
554#[doc = "This description will be updated in the near future."]
555pub mod core0_acs_cache_int_ena;
556#[doc = "CORE0_ACS_CACHE_INT_CLR (w) register accessor: This description will be updated in the near future.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core0_acs_cache_int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core0_acs_cache_int_clr`] module"]
557pub type CORE0_ACS_CACHE_INT_CLR =
558    crate::Reg<core0_acs_cache_int_clr::CORE0_ACS_CACHE_INT_CLR_SPEC>;
559#[doc = "This description will be updated in the near future."]
560pub mod core0_acs_cache_int_clr;
561#[doc = "CORE0_ACS_CACHE_INT_ST (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`core0_acs_cache_int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core0_acs_cache_int_st`] module"]
562pub type CORE0_ACS_CACHE_INT_ST = crate::Reg<core0_acs_cache_int_st::CORE0_ACS_CACHE_INT_ST_SPEC>;
563#[doc = "This description will be updated in the near future."]
564pub mod core0_acs_cache_int_st;
565#[doc = "CORE0_DBUS_REJECT_ST (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`core0_dbus_reject_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core0_dbus_reject_st`] module"]
566pub type CORE0_DBUS_REJECT_ST = crate::Reg<core0_dbus_reject_st::CORE0_DBUS_REJECT_ST_SPEC>;
567#[doc = "This description will be updated in the near future."]
568pub mod core0_dbus_reject_st;
569#[doc = "CORE0_DBUS_REJECT_VADDR (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`core0_dbus_reject_vaddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core0_dbus_reject_vaddr`] module"]
570pub type CORE0_DBUS_REJECT_VADDR =
571    crate::Reg<core0_dbus_reject_vaddr::CORE0_DBUS_REJECT_VADDR_SPEC>;
572#[doc = "This description will be updated in the near future."]
573pub mod core0_dbus_reject_vaddr;
574#[doc = "CORE0_IBUS_REJECT_ST (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`core0_ibus_reject_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core0_ibus_reject_st`] module"]
575pub type CORE0_IBUS_REJECT_ST = crate::Reg<core0_ibus_reject_st::CORE0_IBUS_REJECT_ST_SPEC>;
576#[doc = "This description will be updated in the near future."]
577pub mod core0_ibus_reject_st;
578#[doc = "CORE0_IBUS_REJECT_VADDR (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`core0_ibus_reject_vaddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core0_ibus_reject_vaddr`] module"]
579pub type CORE0_IBUS_REJECT_VADDR =
580    crate::Reg<core0_ibus_reject_vaddr::CORE0_IBUS_REJECT_VADDR_SPEC>;
581#[doc = "This description will be updated in the near future."]
582pub mod core0_ibus_reject_vaddr;
583#[doc = "CACHE_MMU_FAULT_CONTENT (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_mmu_fault_content::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_mmu_fault_content`] module"]
584pub type CACHE_MMU_FAULT_CONTENT =
585    crate::Reg<cache_mmu_fault_content::CACHE_MMU_FAULT_CONTENT_SPEC>;
586#[doc = "This description will be updated in the near future."]
587pub mod cache_mmu_fault_content;
588#[doc = "CACHE_MMU_FAULT_VADDR (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_mmu_fault_vaddr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_mmu_fault_vaddr`] module"]
589pub type CACHE_MMU_FAULT_VADDR = crate::Reg<cache_mmu_fault_vaddr::CACHE_MMU_FAULT_VADDR_SPEC>;
590#[doc = "This description will be updated in the near future."]
591pub mod cache_mmu_fault_vaddr;
592#[doc = "CACHE_WRAP_AROUND_CTRL (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_wrap_around_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_wrap_around_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_wrap_around_ctrl`] module"]
593pub type CACHE_WRAP_AROUND_CTRL = crate::Reg<cache_wrap_around_ctrl::CACHE_WRAP_AROUND_CTRL_SPEC>;
594#[doc = "This description will be updated in the near future."]
595pub mod cache_wrap_around_ctrl;
596#[doc = "CACHE_MMU_POWER_CTRL (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_mmu_power_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_mmu_power_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_mmu_power_ctrl`] module"]
597pub type CACHE_MMU_POWER_CTRL = crate::Reg<cache_mmu_power_ctrl::CACHE_MMU_POWER_CTRL_SPEC>;
598#[doc = "This description will be updated in the near future."]
599pub mod cache_mmu_power_ctrl;
600#[doc = "CACHE_STATE (r) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_state::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_state`] module"]
601pub type CACHE_STATE = crate::Reg<cache_state::CACHE_STATE_SPEC>;
602#[doc = "This description will be updated in the near future."]
603pub mod cache_state;
604#[doc = "CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_encrypt_decrypt_record_disable::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_encrypt_decrypt_record_disable::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_encrypt_decrypt_record_disable`] module"]
605pub type CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE =
606    crate::Reg<cache_encrypt_decrypt_record_disable::CACHE_ENCRYPT_DECRYPT_RECORD_DISABLE_SPEC>;
607#[doc = "This description will be updated in the near future."]
608pub mod cache_encrypt_decrypt_record_disable;
609#[doc = "CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_encrypt_decrypt_clk_force_on::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_encrypt_decrypt_clk_force_on::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_encrypt_decrypt_clk_force_on`] module"]
610pub type CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON =
611    crate::Reg<cache_encrypt_decrypt_clk_force_on::CACHE_ENCRYPT_DECRYPT_CLK_FORCE_ON_SPEC>;
612#[doc = "This description will be updated in the near future."]
613pub mod cache_encrypt_decrypt_clk_force_on;
614#[doc = "CACHE_PRELOAD_INT_CTRL (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_preload_int_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_preload_int_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_preload_int_ctrl`] module"]
615pub type CACHE_PRELOAD_INT_CTRL = crate::Reg<cache_preload_int_ctrl::CACHE_PRELOAD_INT_CTRL_SPEC>;
616#[doc = "This description will be updated in the near future."]
617pub mod cache_preload_int_ctrl;
618#[doc = "CACHE_SYNC_INT_CTRL (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_sync_int_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_sync_int_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_sync_int_ctrl`] module"]
619pub type CACHE_SYNC_INT_CTRL = crate::Reg<cache_sync_int_ctrl::CACHE_SYNC_INT_CTRL_SPEC>;
620#[doc = "This description will be updated in the near future."]
621pub mod cache_sync_int_ctrl;
622#[doc = "CACHE_MMU_OWNER (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_mmu_owner::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_mmu_owner::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_mmu_owner`] module"]
623pub type CACHE_MMU_OWNER = crate::Reg<cache_mmu_owner::CACHE_MMU_OWNER_SPEC>;
624#[doc = "This description will be updated in the near future."]
625pub mod cache_mmu_owner;
626#[doc = "CACHE_CONF_MISC (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_conf_misc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_conf_misc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_conf_misc`] module"]
627pub type CACHE_CONF_MISC = crate::Reg<cache_conf_misc::CACHE_CONF_MISC_SPEC>;
628#[doc = "This description will be updated in the near future."]
629pub mod cache_conf_misc;
630#[doc = "ICACHE_FREEZE (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_freeze::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_freeze::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_freeze`] module"]
631pub type ICACHE_FREEZE = crate::Reg<icache_freeze::ICACHE_FREEZE_SPEC>;
632#[doc = "This description will be updated in the near future."]
633pub mod icache_freeze;
634#[doc = "ICACHE_ATOMIC_OPERATE_ENA (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_atomic_operate_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_atomic_operate_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_atomic_operate_ena`] module"]
635pub type ICACHE_ATOMIC_OPERATE_ENA =
636    crate::Reg<icache_atomic_operate_ena::ICACHE_ATOMIC_OPERATE_ENA_SPEC>;
637#[doc = "This description will be updated in the near future."]
638pub mod icache_atomic_operate_ena;
639#[doc = "CACHE_REQUEST (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_request::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_request::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_request`] module"]
640pub type CACHE_REQUEST = crate::Reg<cache_request::CACHE_REQUEST_SPEC>;
641#[doc = "This description will be updated in the near future."]
642pub mod cache_request;
643#[doc = "IBUS_PMS_TBL_LOCK (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`ibus_pms_tbl_lock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ibus_pms_tbl_lock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibus_pms_tbl_lock`] module"]
644pub type IBUS_PMS_TBL_LOCK = crate::Reg<ibus_pms_tbl_lock::IBUS_PMS_TBL_LOCK_SPEC>;
645#[doc = "This description will be updated in the near future."]
646pub mod ibus_pms_tbl_lock;
647#[doc = "IBUS_PMS_TBL_BOUNDARY0 (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`ibus_pms_tbl_boundary0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ibus_pms_tbl_boundary0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibus_pms_tbl_boundary0`] module"]
648pub type IBUS_PMS_TBL_BOUNDARY0 = crate::Reg<ibus_pms_tbl_boundary0::IBUS_PMS_TBL_BOUNDARY0_SPEC>;
649#[doc = "This description will be updated in the near future."]
650pub mod ibus_pms_tbl_boundary0;
651#[doc = "IBUS_PMS_TBL_BOUNDARY1 (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`ibus_pms_tbl_boundary1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ibus_pms_tbl_boundary1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibus_pms_tbl_boundary1`] module"]
652pub type IBUS_PMS_TBL_BOUNDARY1 = crate::Reg<ibus_pms_tbl_boundary1::IBUS_PMS_TBL_BOUNDARY1_SPEC>;
653#[doc = "This description will be updated in the near future."]
654pub mod ibus_pms_tbl_boundary1;
655#[doc = "IBUS_PMS_TBL_BOUNDARY2 (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`ibus_pms_tbl_boundary2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ibus_pms_tbl_boundary2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibus_pms_tbl_boundary2`] module"]
656pub type IBUS_PMS_TBL_BOUNDARY2 = crate::Reg<ibus_pms_tbl_boundary2::IBUS_PMS_TBL_BOUNDARY2_SPEC>;
657#[doc = "This description will be updated in the near future."]
658pub mod ibus_pms_tbl_boundary2;
659#[doc = "IBUS_PMS_TBL_ATTR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`ibus_pms_tbl_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ibus_pms_tbl_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ibus_pms_tbl_attr`] module"]
660pub type IBUS_PMS_TBL_ATTR = crate::Reg<ibus_pms_tbl_attr::IBUS_PMS_TBL_ATTR_SPEC>;
661#[doc = "This description will be updated in the near future."]
662pub mod ibus_pms_tbl_attr;
663#[doc = "DBUS_PMS_TBL_LOCK (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`dbus_pms_tbl_lock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbus_pms_tbl_lock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbus_pms_tbl_lock`] module"]
664pub type DBUS_PMS_TBL_LOCK = crate::Reg<dbus_pms_tbl_lock::DBUS_PMS_TBL_LOCK_SPEC>;
665#[doc = "This description will be updated in the near future."]
666pub mod dbus_pms_tbl_lock;
667#[doc = "DBUS_PMS_TBL_BOUNDARY0 (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`dbus_pms_tbl_boundary0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbus_pms_tbl_boundary0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbus_pms_tbl_boundary0`] module"]
668pub type DBUS_PMS_TBL_BOUNDARY0 = crate::Reg<dbus_pms_tbl_boundary0::DBUS_PMS_TBL_BOUNDARY0_SPEC>;
669#[doc = "This description will be updated in the near future."]
670pub mod dbus_pms_tbl_boundary0;
671#[doc = "DBUS_PMS_TBL_BOUNDARY1 (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`dbus_pms_tbl_boundary1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbus_pms_tbl_boundary1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbus_pms_tbl_boundary1`] module"]
672pub type DBUS_PMS_TBL_BOUNDARY1 = crate::Reg<dbus_pms_tbl_boundary1::DBUS_PMS_TBL_BOUNDARY1_SPEC>;
673#[doc = "This description will be updated in the near future."]
674pub mod dbus_pms_tbl_boundary1;
675#[doc = "DBUS_PMS_TBL_BOUNDARY2 (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`dbus_pms_tbl_boundary2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbus_pms_tbl_boundary2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbus_pms_tbl_boundary2`] module"]
676pub type DBUS_PMS_TBL_BOUNDARY2 = crate::Reg<dbus_pms_tbl_boundary2::DBUS_PMS_TBL_BOUNDARY2_SPEC>;
677#[doc = "This description will be updated in the near future."]
678pub mod dbus_pms_tbl_boundary2;
679#[doc = "DBUS_PMS_TBL_ATTR (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`dbus_pms_tbl_attr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dbus_pms_tbl_attr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dbus_pms_tbl_attr`] module"]
680pub type DBUS_PMS_TBL_ATTR = crate::Reg<dbus_pms_tbl_attr::DBUS_PMS_TBL_ATTR_SPEC>;
681#[doc = "This description will be updated in the near future."]
682pub mod dbus_pms_tbl_attr;
683#[doc = "CLOCK_GATE (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`clock_gate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clock_gate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_gate`] module"]
684pub type CLOCK_GATE = crate::Reg<clock_gate::CLOCK_GATE_SPEC>;
685#[doc = "This description will be updated in the near future."]
686pub mod clock_gate;
687#[doc = "REG_DATE (rw) register accessor: This description will be updated in the near future.\n\nYou can [`read`](crate::Reg::read) this register and get [`reg_date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reg_date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reg_date`] module"]
688pub type REG_DATE = crate::Reg<reg_date::REG_DATE_SPEC>;
689#[doc = "This description will be updated in the near future."]
690pub mod reg_date;