esp32c3/efuse/
rd_repeat_data3.rs

1#[doc = "Register `RD_REPEAT_DATA3` reader"]
2pub type R = crate::R<RD_REPEAT_DATA3_SPEC>;
3#[doc = "Field `DIS_DOWNLOAD_MODE` reader - Set this bit to disable download mode (boot_mode\\[3:0\\] = 0, 1, 2, 3, 6, 7)."]
4pub type DIS_DOWNLOAD_MODE_R = crate::BitReader;
5#[doc = "Field `DIS_LEGACY_SPI_BOOT` reader - Set this bit to disable Legacy SPI boot mode (boot_mode\\[3:0\\] = 4)."]
6pub type DIS_LEGACY_SPI_BOOT_R = crate::BitReader;
7#[doc = "Field `UART_PRINT_CHANNEL` reader - Selectes the default UART print channel. 0: UART0. 1: UART1."]
8pub type UART_PRINT_CHANNEL_R = crate::BitReader;
9#[doc = "Field `FLASH_ECC_MODE` reader - Set ECC mode in ROM, 0: ROM would Enable Flash ECC 16to18 byte mode. 1:ROM would use 16to17 byte mode."]
10pub type FLASH_ECC_MODE_R = crate::BitReader;
11#[doc = "Field `DIS_USB_DOWNLOAD_MODE` reader - Set this bit to disable UART download mode through USB."]
12pub type DIS_USB_DOWNLOAD_MODE_R = crate::BitReader;
13#[doc = "Field `ENABLE_SECURITY_DOWNLOAD` reader - Set this bit to enable secure UART download mode."]
14pub type ENABLE_SECURITY_DOWNLOAD_R = crate::BitReader;
15#[doc = "Field `UART_PRINT_CONTROL` reader - Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled."]
16pub type UART_PRINT_CONTROL_R = crate::FieldReader;
17#[doc = "Field `PIN_POWER_SELECTION` reader - GPIO33-GPIO37 power supply selection in ROM code. 0: VDD3P3_CPU. 1: VDD_SPI."]
18pub type PIN_POWER_SELECTION_R = crate::BitReader;
19#[doc = "Field `FLASH_TYPE` reader - Set the maximum lines of SPI flash. 0: four lines. 1: eight lines."]
20pub type FLASH_TYPE_R = crate::BitReader;
21#[doc = "Field `FLASH_PAGE_SIZE` reader - Set Flash page size."]
22pub type FLASH_PAGE_SIZE_R = crate::FieldReader;
23#[doc = "Field `FLASH_ECC_EN` reader - Set 1 to enable ECC for flash boot."]
24pub type FLASH_ECC_EN_R = crate::BitReader;
25#[doc = "Field `FORCE_SEND_RESUME` reader - Set this bit to force ROM code to send a resume command during SPI boot."]
26pub type FORCE_SEND_RESUME_R = crate::BitReader;
27#[doc = "Field `SECURE_VERSION` reader - Secure version (used by ESP-IDF anti-rollback feature)."]
28pub type SECURE_VERSION_R = crate::FieldReader<u16>;
29#[doc = "Field `RPT4_RESERVED1` reader - Reserved (used for four backups method)."]
30pub type RPT4_RESERVED1_R = crate::FieldReader;
31impl R {
32    #[doc = "Bit 0 - Set this bit to disable download mode (boot_mode\\[3:0\\] = 0, 1, 2, 3, 6, 7)."]
33    #[inline(always)]
34    pub fn dis_download_mode(&self) -> DIS_DOWNLOAD_MODE_R {
35        DIS_DOWNLOAD_MODE_R::new((self.bits & 1) != 0)
36    }
37    #[doc = "Bit 1 - Set this bit to disable Legacy SPI boot mode (boot_mode\\[3:0\\] = 4)."]
38    #[inline(always)]
39    pub fn dis_legacy_spi_boot(&self) -> DIS_LEGACY_SPI_BOOT_R {
40        DIS_LEGACY_SPI_BOOT_R::new(((self.bits >> 1) & 1) != 0)
41    }
42    #[doc = "Bit 2 - Selectes the default UART print channel. 0: UART0. 1: UART1."]
43    #[inline(always)]
44    pub fn uart_print_channel(&self) -> UART_PRINT_CHANNEL_R {
45        UART_PRINT_CHANNEL_R::new(((self.bits >> 2) & 1) != 0)
46    }
47    #[doc = "Bit 3 - Set ECC mode in ROM, 0: ROM would Enable Flash ECC 16to18 byte mode. 1:ROM would use 16to17 byte mode."]
48    #[inline(always)]
49    pub fn flash_ecc_mode(&self) -> FLASH_ECC_MODE_R {
50        FLASH_ECC_MODE_R::new(((self.bits >> 3) & 1) != 0)
51    }
52    #[doc = "Bit 4 - Set this bit to disable UART download mode through USB."]
53    #[inline(always)]
54    pub fn dis_usb_download_mode(&self) -> DIS_USB_DOWNLOAD_MODE_R {
55        DIS_USB_DOWNLOAD_MODE_R::new(((self.bits >> 4) & 1) != 0)
56    }
57    #[doc = "Bit 5 - Set this bit to enable secure UART download mode."]
58    #[inline(always)]
59    pub fn enable_security_download(&self) -> ENABLE_SECURITY_DOWNLOAD_R {
60        ENABLE_SECURITY_DOWNLOAD_R::new(((self.bits >> 5) & 1) != 0)
61    }
62    #[doc = "Bits 6:7 - Set the default UARTboot message output mode. 00: Enabled. 01: Enabled when GPIO8 is low at reset. 10: Enabled when GPIO8 is high at reset. 11:disabled."]
63    #[inline(always)]
64    pub fn uart_print_control(&self) -> UART_PRINT_CONTROL_R {
65        UART_PRINT_CONTROL_R::new(((self.bits >> 6) & 3) as u8)
66    }
67    #[doc = "Bit 8 - GPIO33-GPIO37 power supply selection in ROM code. 0: VDD3P3_CPU. 1: VDD_SPI."]
68    #[inline(always)]
69    pub fn pin_power_selection(&self) -> PIN_POWER_SELECTION_R {
70        PIN_POWER_SELECTION_R::new(((self.bits >> 8) & 1) != 0)
71    }
72    #[doc = "Bit 9 - Set the maximum lines of SPI flash. 0: four lines. 1: eight lines."]
73    #[inline(always)]
74    pub fn flash_type(&self) -> FLASH_TYPE_R {
75        FLASH_TYPE_R::new(((self.bits >> 9) & 1) != 0)
76    }
77    #[doc = "Bits 10:11 - Set Flash page size."]
78    #[inline(always)]
79    pub fn flash_page_size(&self) -> FLASH_PAGE_SIZE_R {
80        FLASH_PAGE_SIZE_R::new(((self.bits >> 10) & 3) as u8)
81    }
82    #[doc = "Bit 12 - Set 1 to enable ECC for flash boot."]
83    #[inline(always)]
84    pub fn flash_ecc_en(&self) -> FLASH_ECC_EN_R {
85        FLASH_ECC_EN_R::new(((self.bits >> 12) & 1) != 0)
86    }
87    #[doc = "Bit 13 - Set this bit to force ROM code to send a resume command during SPI boot."]
88    #[inline(always)]
89    pub fn force_send_resume(&self) -> FORCE_SEND_RESUME_R {
90        FORCE_SEND_RESUME_R::new(((self.bits >> 13) & 1) != 0)
91    }
92    #[doc = "Bits 14:29 - Secure version (used by ESP-IDF anti-rollback feature)."]
93    #[inline(always)]
94    pub fn secure_version(&self) -> SECURE_VERSION_R {
95        SECURE_VERSION_R::new(((self.bits >> 14) & 0xffff) as u16)
96    }
97    #[doc = "Bits 30:31 - Reserved (used for four backups method)."]
98    #[inline(always)]
99    pub fn rpt4_reserved1(&self) -> RPT4_RESERVED1_R {
100        RPT4_RESERVED1_R::new(((self.bits >> 30) & 3) as u8)
101    }
102}
103#[cfg(feature = "impl-register-debug")]
104impl core::fmt::Debug for R {
105    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
106        f.debug_struct("RD_REPEAT_DATA3")
107            .field("dis_download_mode", &self.dis_download_mode())
108            .field("dis_legacy_spi_boot", &self.dis_legacy_spi_boot())
109            .field("uart_print_channel", &self.uart_print_channel())
110            .field("flash_ecc_mode", &self.flash_ecc_mode())
111            .field("dis_usb_download_mode", &self.dis_usb_download_mode())
112            .field("enable_security_download", &self.enable_security_download())
113            .field("uart_print_control", &self.uart_print_control())
114            .field("pin_power_selection", &self.pin_power_selection())
115            .field("flash_type", &self.flash_type())
116            .field("flash_page_size", &self.flash_page_size())
117            .field("flash_ecc_en", &self.flash_ecc_en())
118            .field("force_send_resume", &self.force_send_resume())
119            .field("secure_version", &self.secure_version())
120            .field("rpt4_reserved1", &self.rpt4_reserved1())
121            .finish()
122    }
123}
124#[doc = "BLOCK0 data register 4.\n\nYou can [`read`](crate::Reg::read) this register and get [`rd_repeat_data3::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
125pub struct RD_REPEAT_DATA3_SPEC;
126impl crate::RegisterSpec for RD_REPEAT_DATA3_SPEC {
127    type Ux = u32;
128}
129#[doc = "`read()` method returns [`rd_repeat_data3::R`](R) reader structure"]
130impl crate::Readable for RD_REPEAT_DATA3_SPEC {}
131#[doc = "`reset()` method sets RD_REPEAT_DATA3 to value 0"]
132impl crate::Resettable for RD_REPEAT_DATA3_SPEC {}
esp32c3/efuse/rd_repeat_data3.rs

esp32c3/efuse/
rd_repeat_data3.rs
